US2006081907A1PendingUtilityA1

Nonvolatile semiconductor memory device having grooves isolating the floating electrodes of memory cells and method of manufacturing the nonvolatile semiconductor memory device

Assignee: TOSHIBA KKPriority: Apr 11, 2003Filed: Dec 1, 2005Published: Apr 20, 2006
Est. expiryApr 11, 2023(expired)· nominal 20-yr term from priority
H10D 30/6891H10B 69/00H10B 41/30
45
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Claims

Abstract

A plurality of nonvolatile memory elements formed on element regions respectively isolated by element isolation regions on a main surface of a first conductive type semiconductor substrate, the nonvolatile semiconductor memory elements comprising a gate insulating film formed on the main surface of the semiconductor substrate, a plurality of floating electrodes formed along a first direction on the gate insulating film, a plurality of grooves formed among the plurality of floating electrodes, groove insulating films filled in the plurality of the grooves, a second conductive type impurity diffusion region formed along a second direction so as to sandwich the floating electrodes, interelectrode insulating films formed along the first direction on the plurality of floating electrodes and the groove insulating films, and control electrodes formed on the interelectrode insulating films.

Claims

exact text as granted — not AI-modified
1 - 22 . (canceled)  
   
   
       23 . A nonvolatile semiconductor memory device comprising: 
 a semiconductor substrate including a plurality of element isolation grooves formed along a first direction on a main surface and a plurality of element regions respectively isolated by the element isolation grooves;    an element isolation insulating film formed in the element isolation grooves, a top surface of the element isolation insulating film being higher than a surface of the semiconductor substrate;    a gate insulating film formed on the element regions of the semiconductor substrate;    a plurality of floating electrodes formed along a second direction intersecting the first direction, with the element isolation regions interposed in between, the top surface of the floating electrode being flush with a top surface of the element isolation insulating film;    interelectrode insulating films having a higher dielectric constant than the element isolation insulating film and formed along the second direction on the plurality of floating electrodes and the element isolation insulating film; and    a control electrode formed along the second direction on the interelectrode insulating film.    
   
   
       24 . The device according to  claim 23 , wherein the interelectrode insulating film is an alumina film.  
   
   
       25 . The device according to  claim 23 , wherein the interelectrode insulating film is a tantalum oxide film.  
   
   
       26 . The device according to  claim 23 , wherein a top end portion of the element isolation insulating film has a tapered surface and the floating electrodes have a greater width at a top surface than at a bottom surface.  
   
   
       27 . A nonvolatile semiconductor memory device comprising: 
 a semiconductor substrate including a plurality of element isolation grooves formed along a first direction on a main surface and a plurality of element regions respectively isolated by the element isolation grooves;    an element isolation insulating film formed in the element isolation grooves, a top surface of the element isolation insulating film being higher than a surface of the semiconductor substrate;    a gate insulating film formed on the element regions of the semiconductor substrate;    a plurality of floating electrodes formed along a second direction intersecting the first direction, with the element isolation insulating films interposed in between, the top surface of the floating electrode being lower than a top surface of the element isolation insulating film;    interelectrode insulating films having a higher dielectric constant than the element isolation insulating film and formed along the second direction on the plurality of floating electrodes and the element isolation insulating film; and    a control electrode formed along the second direction on the interelectrode insulating film.    
   
   
       28 . The device according to  claim 27 , wherein the interelectrode insulating film is an alumina film.  
   
   
       29 . The device according to  claim 27 , wherein the interelectrode insulating film is a tantalum oxide film.

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