US2006056759A1PendingUtilityA1

Polished polyimide substrate

Assignee: FARAH JOHNPriority: May 2, 2003Filed: Nov 2, 2005Published: Mar 16, 2006
Est. expiryMay 2, 2023(expired)· nominal 20-yr term from priority
Inventors:John Farah
G02B 2006/12176G02B 6/3688H05K 1/0274G02B 6/138G02B 6/3636G02B 6/3652G02B 6/364G02B 6/3692G02B 6/30
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Claims

Abstract

Polymer substrates, in particular polyimide substrates, and polymer laminates for optical applications are described. Polyimide substrates are polished to an average surface roughness of about 0.25μ inch, and single-layer or multi-layer waveguide structures are deposited on the polished polyimide substrates. Laminates including polymer or a hybrid organic/inorganic waveguiding film can be deposited on a polished polyimide substrate. The laminate can also include piezoelectric and metallic layers. Micromachined optical devices, such as cantilevered waveguide are fabricated by laser ablation using a combination of IR and UV lasers. A fiber-to-waveguide coupler with a laser-machined groove for holding the fiber is also disclosed. Holes are drilled in the polyimide wafer using excimer or tripled YAG laser. The holes are metallized to provide mircovias. Metallized polyimide wafers are stacked and attached using flip chip bonding technology to provide three-dimensional high density interconnects for microelectronic chip packaging.

Claims

exact text as granted — not AI-modified
1 . A substrate for a circuit structure comprising: 
 a planar substrate mass of polyimide material having a first side and a second side, said first side being polished to a surface smoothness between about 0.025 μinch and 100 μinch, capable of receiving a circuit structure.    
   
   
       2 . The substrate for a circuit structure of  claim 1 , wherein said surface smoothness is between about 0.025 μinch and 0.5 μinch.  
   
   
       3 . The substrate for a circuit structure of  claim 1 , wherein said surface smoothness is between about 0.25 μinch and 100 μinch.  
   
   
       4 . The substrate for a circuit structure of  claim 3 , wherein said surface smoothness is between about 0.25 μinch and 0.5 μinch.  
   
   
       5 . The substrate for a circuit structure of  claim 1 , wherein said polyimide is a thermoset polyimide.  
   
   
       6 . The substrate for a circuit structure of  claim 1 , wherein said polyimide is a thermoplastic polyimide.  
   
   
       7 . The substrate for a circuit structure of  claim 6 , wherein said thermoplastic polyimide is injection molded.  
   
   
       8 . The substrate for a circuit structure of  claim 1 , further comprising a first layer applied to said first polished side of said planar substrate mass, a second layer applied over said first layer, wherein the index of refraction of said second layer is greater than the index of refraction of said first layer.  
   
   
       9 . The substrate for a circuit structure of  claim 8 , wherein said first polymer layer and said second polymer layer are fluorinated polymers.  
   
   
       10 . The substrate for a circuit structure of  claim 9 , wherein said first polymer layer and said second polymer layer are made of perfluorocyclobutane (PFCB).  
   
   
       11 . The substrate for a circuit structure of  claim 1 , further comprising a first polymer layer applied to said first polished side of said planar substrate mass, wherein said first polymer layer has a refractive index that is greater than the refractive index of said polyimide substrate.  
   
   
       12 . The substrate for a circuit structure of  claim 11  wherein said first polymer layer has a thermo-optic coefficient that is substantially equal to a negative of the product of the index of refraction of said first polymer layer and the coefficient of thermal expansion of said polyimide substrate.  
   
   
       13 . The substrate for a circuit structure of  claim 1 , further comprising a first metallic layer applied to said first polished side of said planar substrate mass, a piezoelectric layer applied over said first metallic layer, a second metallic layer applied over said piezoelectric layer.  
   
   
       14 . The substrate for a circuit structure of  claim 13 , wherein said piezoelectric layer is PZT.  
   
   
       15 . The substrate for a circuit structure of  claim 14 , wherein said first metallic layer is platinum.  
   
   
       16 . A method of preparing a substrate for a circuit structure comprising: 
 providing a planar substrate mass of polyimide material having a first side and a second side; and    polishing said first side to a surface smoothness between about 0.025 μinch and 100 μinch.    
   
   
       17 . The method of  claim 16  wherein the step of polishing comprises chemical mechanical polishing.  
   
   
       18 . The method of  claim 16  further comprising: 
 applying a first metallic layer to said first polished side of said planar polyimide mass by sputtering.    
   
   
       19 . The method of  claim 18 , further comprising: 
 shaping said planar polyimide substrate mass and said first metallic layer to form holes using at least one laser emitting in the ultraviolet spectral range.    
   
   
       20 . A method of forming a groove having a precise depth and width in a planar substrate mass of polyimide material comprising: 
 providing a planar substrate mass of polyimide material having a first side and a second side;    polishing said first side to a surface smoothness between about 0.025 μinch and 100 μinch; and    cutting said first side of said planar substrate mass using a pulsed laser, said pulsed laser outputting a predetermined number of pulses to form a groove having a depth and a width capable of receiving an optical fiber.

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