Processing methods of forming an electrically conductive plug to a node location

Abstract

Methods of forming electrical connections with an integrated circuitry substrate node location are described. According to one aspect of the invention, a substrate node location is laterally surrounded with insulating material and left outwardly exposed. Conductive material is deposited over the exposed node location. Subsequently, a photomaskless etch of the conductive material is conducted to a degree sufficient to leave a plug of conductive material over the node location. In a preferred implementation, the insulating material with which such node location is surrounded constitutes insulating material portions which are provided relative to conductive lines which are formed over the substrate. In another preferred implementation, such conductive lines form a grid of insulating material which, in turn, defines the node location. According to a preferred aspect of the invention, a plurality of insulated conductive lines are formed over a substrate. At least some of the conductive lines constitute word lines and at least some of the conductive lines constitute bit lines. The lines are preferably formed to define and laterally surround an active area substrate location. The substrate location is preferably surrounded by at least four of the lines. Conductive material is deposited over the substrate and the conductive lines and in electrical contact with the node location. The conductive material is then removed to a degree sufficient to form an isolated plug of conductive material over the node location and between the four conductive lines.

1 - 29 . (canceled)  
   
   
       30 . A semiconductive structure comprising: 
 a conductive node within a substrate;    a plurality of conductive lines over the substrate and establishing a lateral boundary around an entirety of the conductive node; and    masking material over the plurality of the conductive lines and the conductive node, a conductive portion of at least one of the plurality of the conductive lines being exposed through the masking material, the conductive portion being adjacent the conductive node.    
   
   
       31 . The structure of  claim 30  wherein the plurality of the conductive lines comprises at least three conductive lines establishing the lateral boundary.  
   
   
       32 . The structure of  claim 30  wherein the plurality of the conductive lines comprises at least four conductive lines establishing the lateral boundary.  
   
   
       33 . The structure of  claim 30  wherein the plurality of the conductive lines comprises only four conductive lines establishing the lateral boundary.  
   
   
       34 . The structure of  claim 30  wherein the conductive node comprises a diffusion region within the substrate.  
   
   
       35 . The structure of  claim 30  wherein at least a portion of the substrate comprises semiconductive material, and wherein the conductive node is located within the semiconductive material of the substrate.  
   
   
       36 . The structure of  claim 30  wherein at least a portion of the substrate comprises semiconductive material, and wherein the conductive node comprises a diffusion region within the semiconductive material of the substrate.  
   
   
       37 . The structure of  claim 30  wherein only one of the plurality of the conductive lines comprises the exposed conductive portion.  
   
   
       38 . The structure of  claim 30  wherein the exposed conductive portion is through an opening extending through an electrically insulative spacer.  
   
   
       39 . The structure of  claim 38  wherein the spacer comprises nitride material.  
   
   
       40 . The structure of  claim 38  wherein the spacer comprises oxide material.  
   
   
       41 . A semiconductive structure comprising: 
 a plurality of conductive lines over a substrate and comprising a lateral boundary around an entirety of a portion of the substrate;    a conductive node within the portion of the substrate; and    masking material over the plurality of the conductive lines and the conductive node, an opening extending through the masking material to a conductive portion of at least one of the plurality of the conductive lines, the conductive portion being adjacent the conductive node.    
   
   
       42 . The structure of  claim 41  wherein the opening extends through the masking material to the conductive node.  
   
   
       43 . The structure of  claim 41  wherein the opening extends through the masking material to the conductive node, and further comprising at least a portion of the opening being filled with conductive material, the conductive material contacting the conductive node and the conductive portion of the at least one of the plurality of the conductive lines.  
   
   
       44 . The structure of  claim 43  wherein the plurality of the conductive lines comprises respective uppermost surfaces, and wherein the conductive material comprises an uppermost surface elevationally below the respective uppermost surfaces of the plurality of the conductive lines.  
   
   
       45 . The structure of  claim 43  wherein the conductive material comprises polysilicon.  
   
   
       46 . The structure of  claim 43  wherein the conductive material comprises tungsten.  
   
   
       47 . The structure of  claim 41  wherein the opening extends substantially vertically from over the substrate, and wherein a substantial portion of the opening has a horizontal cross section comprising a rectangle.  
   
   
       48 . The structure of  claim 41  wherein the opening extends to the conductive portion of only one of the plurality of the conductive lines.  
   
   
       49 . The structure of  claim 41  wherein the plurality of the conductive lines comprises a first pair of spaced conductive lines and a second pair of spaced conductive lines, the first pair comprising bit lines and the second pair comprising word lines.