US2006043484A1PendingUtilityA1

Self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk mosfets and for shallow junctions

Assignee: IBMPriority: May 11, 2000Filed: Nov 17, 2004Published: Mar 2, 2006
Est. expiryMay 11, 2020(expired)· nominal 20-yr term from priority
H10D 64/0112H10D 30/0323H10D 30/6739H10D 30/6737H10D 30/60H10D 30/0212H10D 30/6743
41
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Claims

Abstract

A method (and resulting structure) for fabricating a silicide for a semiconductor device, includes depositing a metal or an alloy thereof on a silicon substrate, reacting the metal or the alloy to form a first silicide phase, etching any unreacted metal, depositing a silicon cap layer over the first silicide phase, reacting the silicon cap layer to form a second silicide phase, for the semiconductor device, and etching any unreacted silicon. The substrate can be either a silicon-on-insulator (SOI) substrate or a bulk silicon substrate.

Claims

exact text as granted — not AI-modified
1 - 13 . (canceled)  
   
   
       14 . A semiconductor device, comprising: 
 a silicon substrate;    a raised source-drain structure, including a silicided portion formed with an amorphous silicon, formed on said substrate without selective epitaxy processing,    said raised source-drain structure having a surface which is facet-free and has a crystallographic shape which is arbitrary.    
   
   
       15 . The device of  claim 14 , wherein said substrate comprises a bulk silicon substrate.  
   
   
       16 . The device of  claim 14 , wherein said substrate comprises a silicon-on-insulator (SOI) substrate.  
   
   
       17 . The device of  claim 14 , wherein said silicided portion includes a metal comprising one of Co, Ti and Ni.  
   
   
       18 . The device of  claim 17 , wherein said metal includes cobalt having a film thickness in a range of approximately 7 nm to approximately 8 nm.  
   
   
       19 . The device of  claim 18 , wherein a W cap is formed on said metal for preventing oxidation during a subsequent anneal processing.  
   
   
       20 . The device of  claim 18 , wherein a TiN cap is formed on said metal for preventing oxidation during a subsequent anneal processing.  
   
   
       21 . The device of  claim 14 , wherein said raised source-drain structure is free of crystal orientation constraints.  
   
   
       22 . The device of  claim 14 , wherein said raised source-drain structure is non-aligned with a crystallographic direction of said substrate.

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