US2006026596A1PendingUtilityA1

Context scheduling

Assignee: INTEL CORPPriority: Nov 19, 2001Filed: May 31, 2005Published: Feb 2, 2006
Est. expiryNov 19, 2021(expired)· nominal 20-yr term from priority
G06F 9/3851
48
PatentIndex Score
0
Cited by
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References
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Claims

Abstract

A programmable processing system that executes multiple instruction contexts includes an instruction memory for storing instructions that are executed by the system, fetch logic for determining an address of an instruction, with the fetch logic including scheduling logic that schedules execution of the instruction contexts based on condition signals indicating an availability of a hardware resource, with the condition signals being divided into groups of condition signals, which are sampled in turn by the scheduling logic to provide a plurality of scan sets of sampled conditions.

Claims

exact text as granted — not AI-modified
1 . A device and/or method substantially as shown and described.

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