US2006025103A1PendingUtilityA1

AM demodulator

Assignee: IANCU DANIELPriority: Mar 28, 2003Filed: Oct 7, 2005Published: Feb 2, 2006
Est. expiryMar 28, 2023(expired)· nominal 20-yr term from priority
Inventors:Daniel Iancu
H03G 3/3036H04B 1/0003H04B 1/0021H03G 3/3052H04B 1/28H04L 27/06H04B 1/16
47
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Claims

Abstract

An amplitude modulation receiver including an antenna for receiving a signal and an input filter connected to the antenna. A variable gain amplifier is connected to the input filter and is responsive to a gain control signal. An A/D converter is connected to the variable gain amplifier and is responsive to a sampling signal and provides a sampled digital signal. A D/A converter receives a demodulated signal and provides an analog output signal. A controller receives and demodulates the sampled digital signal from the A/D converter, generates the gain control signal for the variable gain amplifier, generates the sampling signal for the A/D converter, and provides the demodulated signal to the D/A converter. The demodulation and generation of the gain control signal and the sampling signal are performed in software.

Claims

exact text as granted — not AI-modified
1 . A demodulator for an amplitude modulation receiver, the demodulator includes software which comprises: 
 an input filter for filtering an input signal;    a decimator and integrator demodulator for demodulating the filtered input signal; and    an output filter for filtering the demodulated signal.    
     
     
         2 . The demodulator according to  claim 1 , wherein the demodulator and the input filter are tuned to the carrier frequency of the input signal and the output filter is tuned to a decimated carrier frequency.  
     
     
         3 . The demodulator according to  claim 1 , wherein coefficients of the filters for each carrier frequency are stored in the demodulator.  
     
     
         4 . The demodulator according to  claim 1 , wherein the filtered signal is multiplied by a demodulation signal at a carrier frequency and integrated over a carrier cycle period.  
     
     
         5 . The demodulator according to  claim 4 , wherein the input and output filters filter the input signal and the integrated demodulated signal respectively to band pass about the carrier frequency.  
     
     
         6 . The demodulator according to  claim 1 , wherein: 
 the filtered input signal s(t) is segmented by a windowing function g(t−mT c ), where T c  is a cycle time period;    the segments of the filtered input signal s(t) are multiplied by the carrier frequency w k , which produces demodulated segments d(t);    the demodulated segments d(t) are segmented by a windowing function g(t−lT c ),    the segmented demodulated signals d(t) are integrated over the cycle period T c , every period; and    the integrated demodulated segments are summed and filtered by the output filter, which produces the modulation function φ k [nT c ].    
     
     
         7 . The demodulator according to  claim 1 , wherein the demodulator is a multi-thread processor performing input filtering, decimation, integration and output filtering in parallel.

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