Magnetic memory devices including ferroelectric spacers and related methods

Abstract

A magnetic memory device may include a digit line on a substrate, a first insulating layer on the digit line, and a magnetic tunnel junction memory cell on the first insulating layer so that the first insulating layer is between the digit line and the magnetic tunnel junction memory cell. A second insulating layer may be provided on the magnetic tunnel junction memory cell, wherein the second insulating layer has a hole therein exposing portions of the magnetic tunnel junction memory cell. A bit line may be provided on the second insulating layer and on portions of the magnetic tunnel junction memory cell exposed by the hole in the second insulating layer, and ferromagnetic spacers may be provided on sidewalls of at least one of the digit line and/or the bit line. Related methods are also discussed.

1 . A magnetic memory device comprising: 
 a digit line on a substrate;    a first insulting layer on the digit line;    a magnetic tunnel junction memory cell on the first insulating layer wherein the first insulating layer is between the digit line and the magnetic tunnel junction memory cell;    a second insulating layer on the magnetic tunnel junction memory cell, the second insulating layer having a hole therein exposing portions of the magnetic tunnel junction memory cell;    a bit line on the second insulating layer and on portions of the magnetic tunnel junction memory cell exposed by the hole in the second insulating layer; and    ferromagnetic spacers on sidewalls of at least one of the digit line and/or the bit line.    
   
   
       2 . A magnetic memory device according to  claim 1  further comprising: 
 a ferromagnetic plate between the digit line and the substrate, wherein the ferromagnetic spacers are on sidewalls of the digit line and the ferromagnetic plate.    
   
   
       3 . A magnetic memory device according to  claim 2  wherein the digit line comprises a material having an etch selection ratio with respect to the ferromagnetic spacers.  
   
   
       4 . A magnetic memory device according to  claim 2  further comprising: 
 a capping layer between the digit line and the first insulating layer, wherein sidewalls of the capping layer are aligned with sidewalls of the digit line.    
   
   
       5 . A magnetic memory device according to  claim 4  wherein the ferromagnetic spacers are on at least portions of sidewalls of the capping layer.  
   
   
       6 . A magnetic memory device according to  claim 4  wherein the capping layer comprises a material having an etch selection ratio with respect to at least one of the ferromagnetic plate and/or the ferromagnetic spacers.  
   
   
       7 . A magnetic memory device according to  claim 1  further comprising: 
 a ferromagnetic plate on the bit line, wherein sidewalls of the ferromagnetic plate are aligned with sidewalls of the bit line, wherein the ferromagnetic spacers are on sidewalls of the bit line and the ferromagnetic plate.    
   
   
       8 . A magnetic memory device according to  claim 7  further comprising: 
 a capping layer on the ferromagnetic plate, wherein the ferromagnetic plate is between the capping layer and the bit line and wherein sidewalls of the capping layer are aligned with sidewalls of the bit line.    
   
   
       9 . A magnetic memory device according to  claim 8  wherein the ferromagnetic spacers are on at least portions of sidewalls of the capping pattern.  
   
   
       10 . A magnetic memory device according to  claim 8  wherein the capping layer comprises a material having an etch selection ratio with respect to the ferromagnetic plate and/or the ferromagnetic spacers.  
   
   
       11 . A magnetic memory device according to  claim 1  further comprising: 
 a first ferromagnetic plate between the digit line and the substrate, wherein the ferromagnetic spacers include first ferromagnetic spacers on sidewalls of the digit line and the first ferromagnetic plate; and    a second ferromagnetic plate on the bit line, wherein sidewalls of the second ferromagnetic plate are aligned with sidewalls of the bit line, wherein the second ferromagnetic spacers are on sidewalls of the bit line and the second ferromagnetic plate.    
   
   
       12 . A magnetic memory device according to  claim 11  wherein the digit line comprises a conductive material having an etch selection ratio with respect to the first ferromagnetic spacers.  
   
   
       13 . A magnetic memory device according to  claim 11  further comprising: 
 a first capping layer between the digit line and the first insulating layer, wherein the first capping layer has sidewalls aligned with sidewalls of the digit line; and    a second capping layer on the second ferromagnetic plate, wherein the second ferromagnetic plate is between the second capping layer and the bit line and wherein the second capping layer has sidewalls aligned with sidewalls of the bit line.    
   
   
       14 . A magnetic memory device according to  claim 13  wherein the first ferromagnetic spacers are on at least portions of sidewalls of the first capping layer, and wherein the second ferromagnetic spacers are on at least portions of sidewalls of the second capping layer.  
   
   
       15 . A magnetic memory device according to  claim 13  wherein the first capping layer comprises a material having an etch selection ratio with respect to at least one of the first ferromagnetic plate and/or the first ferromagnetic spacers, and wherein the second capping layer comprises a material having an etch selection ratio with respect to at least one of the second ferromagnetic plate and/or the second ferromagnetic spacers.  
   
   
       16 . A magnetic memory device according to  claim 1  wherein the ferromagnetic spacers are on sidewalls of at least one of the digit line and/or the bit line adjacent the magnetic tunnel junction memory cell.  
   
   
       17 . A method of forming a magnetic memory device, the method comprising: 
 forming a digit line on a substrate;    forming a first insulting layer on the digit line;    forming a magnetic tunnel junction memory cell on the first insulating layer wherein the first insulating layer is between the digit line and the magnetic tunnel junction memory cell;    forming a second insulating layer on the magnetic tunnel junction memory cell, the second insulating layer having a hole therein exposing portions of the magnetic tunnel junction memory cell;    forming a bit line on the second insulating layer and on portions of the magnetic tunnel junction memory cell exposed by the hole in the second insulating layer; and    forming ferromagnetic spacers on sidewalls of at least one of the digit line and/or the bit line.    
   
   
       18 . A method according to  claim 17  further comprising: 
 forming a ferromagnetic plate between the digit line and the substrate; and    wherein forming the ferromagnetic spacers comprises, before forming the first insulating layer, forming a conformal ferromagnetic layer on the digit line and the ferromagnetic plate and anisotropic etching the conformal ferromagnetic layer.    
   
   
       19 . A method according to  claim 18  wherein the digit line comprises a conductive material having an etch selection ratio with respect to the conformal ferromagnetic layer.  
   
   
       20 . A method according to  claim 18  further comprising: 
 before forming the conformal ferromagnetic layer, forming a capping layer on the digit line, wherein sidewalls of the capping layer are aligned with sidewalls of the digit line and wherein the conformal ferromagnetic layer is formed on sidewalls of the ferromagnetic plate, the digit line, and the capping layer.    
   
   
       21 - 35 . (canceled)