Synchronous content addressable memory

Abstract

A content addressable memory (CAM) device. The CAM device is a synchronous device that may perform all of the following operations all in one clock cycle: (1) receive comparand data from a comparand bus; (2) receive an instruction from an instruction bus instructing the CAM device to compare the comparand data with a first group of CAM cells in a CAM array; (3) perform the comparison of the comparand data with the first group of CAM cells; (4) generate a match address for a location in the CAM array that stores data matching the comparand data; (5) access data stored in a second group of the CAM cells in the CAM array, wherein the second group of CAM cells may store data associated with the matched location; and (6) output to an output bus the match address, the data stored in the second group of CAM cells, and/or status information corresponding to the matched address or the second group of CAM cells. The status information may include a match flag, multiple match flag, full flag, skip bit, empty bit, or a device identification for the CAM device.

1 . A method of reading data from a synchronous content addressable memory (CAM) device, comprising the steps of: 
 instructing the CAM device to compare comparand data with data stored in a plurality of first CAM cells;    comparing the comparand data with the data stored in each of the plurality of first CAM cells;    sensing data stored in a second CAM cell; and    outputting the sensed data from the CAM device, wherein the instructing, comparing, sensing, and outputting steps all occur within one clock cycle.    
     
     
         2 - 37 . (canceled)