Atomic layer deposition of interpoly oxides in a non-volatile memory device

Abstract

Aluminum oxide is deposited by atomic layer deposition to form a high-k dielectric for the interpoly dielectric layer of a non-volatile memory device. The increased capacitive coupling can allow a thicker oxide layer to be used between the floating gate and the control gate, resulting in improved reliability and longer lifetime of the memory cells fabricated according to this invention.

1 . A method for manufacturing an integrated circuit comprising a nonvolatile memory, the method comprising: 
 forming a first layer, the first layer being to provide one or more floating gates for the nonvolatile memory;    forming a dielectric layer over the first layer, wherein forming the dielectric layer comprises forming a high-k dielectric layer by atomic layer deposition;    forming a conductive layer separated from the first layer by the dielectric layer, the conductive layer providing one or more control gates for the nonvolatile memory;    wherein the high-k dielectric layer comprises aluminum oxide;    wherein forming the dielectric layer further comprises: 
 forming a first silicon oxide layer over the first layer;  
 forming the high-k dielectric layer on the first silicon oxide layer; and  
 forming a second silicon oxide layer over the high-k dielectric layer.  
   
     
     
         2 . The method of  claim 1 , further comprising patterning the first layer, the dielectric layer, and the conductive layer by lithographic processes after forming said conductive layer.  
     
     
         3 . The method of  claim 1 , wherein the high-k dielectric layer has a dielectric constant greater than 7.5.  
     
     
         4 . The method of  claim 1 , wherein the high-k dielectric layer comprises a high-k oxide layer.  
     
     
         5 . The method of  claim 1 , further comprising nitriding the second silicon oxide layer.  
     
     
         6 . The method of  claim 1  wherein forming the high-k dielectric layer over the first layer comprises: 
 providing a clean substrate upon which the first layer has been formed, within a reaction chamber;    introducing a metallic precursor gas into the chamber;    purging the chamber with an inert gas; and    introducing an oxidizing gas into the chamber whereby a monolayer of high-k oxide is deposited on the substrate.    
     
     
         7 . The method of  claim 6 , wherein the metallic precursor gas is Al(CH3)3.  
     
     
         8 . The method of  claim 6 , wherein the oxidizing gas is water vapor or ozone.  
     
     
         9 . The method of  claim 6 , wherein forming the high-k dielectric layer comprises repeating the steps of: 
 introducing a metallic precursor gas into the chamber;    purging the chamber with an inert gas;    introducing an oxidizing gas into the chamber; and    purging the chamber with an inert gas, to make additional monolayers of the high-k dielectric layer.    
     
     
         10 . The method of  claim 1  further comprising: 
 (1) after forming the first silicon oxide layer and before forming the high-k dielectric layer, processing the first silicon oxide layer to form a hydroxy-terminated surface structure Si—O—H on a top surface of the first silicon oxide layer.    
     
     
         11 . The method of  claim 10  wherein the operation (1) comprises processing the first silicon oxide layer with H 2 O 2  and/or NH 4 OH.  
     
     
         12 . A method for manufacturing an integrated circuit comprising a nonvolatile memory, the method comprising: 
 forming a first layer comprising silicon, the first layer being to provide one or more floating gates for the nonvolatile memory;    forming a dielectric layer over the first layer, wherein forming the dielectric layer comprises depositing a first high temperature oxide over the first layer; depositing a high-k dielectric layer over the first oxide using atomic layer deposition; depositing a second high temperature oxide over the high-k dielectric layer; and    forming a conductive layer separated from the first layer by the dielectric layer, the conductive layer providing one or more control gates for the nonvolatile memory;    wherein the high-k dielectric layer comprises aluminum oxide.    
     
     
         13 . The method of  claim 12 , wherein the high-k dielectric layer has a dielectric constant greater than 7.5.  
     
     
         14 . The method of  claim 12 , wherein the high-k dielectric layer comprises a high-k oxide layer.  
     
     
         15 . The method of  claim 12  wherein depositing the high-k dielectric layer over the first oxide comprises depositing a plurality of monolayers of aluminum oxide by atomic layer deposition over the first layer.  
     
     
         16 . A method for manufacturing an integrated circuit comprising a nonvolatile memory, the method comprising: 
 (1) forming a first layer, the first layer being to provide one or more floating gates for the nonvolatile memory;    (2) forming a dielectric layer over the first layer, wherein forming the dielectric layer comprises: 
 (2A) forming a first silicon oxide layer over the first layer;  
 (2B) processing the first silicon oxide layer to form a hydroxy-terminated surface structure Si—O—H on a top surface of the first silicon oxide layer;  
 (2C) after forming the hydroxy-terminated surface structure, forming a high-k dielectric layer on the first silicon oxide layer;  
   (3) wherein the method further comprises forming a conductive layer separated from the first layer by the dielectric layer, the conductive layer providing one or more control gates for the nonvolatile memory.    
     
     
         17 . The method of  claim 16  wherein the operation (2B) comprises: 
 (2B-1) processing the first silicon oxide layer with a solution of a mixture of NH 4 OH, H 2 O 2  and deionized water.    
     
     
         18 . The method of  claim 17  wherein the solution is at 45-55° C.  
     
     
         19 . The method of  claim 17  wherein the operation (2B) further comprises: 
 (2B-2) processing the first silicon oxide layer with a solution of HCl, H 2 O 2  and deionized water.    
     
     
         20 . The method of  claim 19  wherein the operation (2B-2) is performed after (2B-1).  
     
     
         21 . The method of  claim 20  wherein the operation (2B) further comprises, between the operations (2B-1) and (2B-2), processing the first silicon oxide layer with a hydrofluoric rinse.  
     
     
         22 . The method of  claim 16  wherein the operation (2B) comprises processing the first silicon oxide layer with a solution of HCl, H 2 O 2  and deionized water.  
     
     
         23 . The method of  claim 16  wherein the high-k dielectric layer comprises aluminum oxide.  
     
     
         24 . The method of  claim 16  wherein the high-k dielectric layer is formed using a chlorine containing precursor.  
     
     
         25 . The method of  claim 24  wherein the high-k dielectric layer comprises one or more of HfO 2 , ZrO 2 , TaO 2 , TiO 2 .  
     
     
         26 . A method for manufacturing an integrated circuit comprising a nonvolatile memory, the method comprising: 
 (1) forming a first layer, the first layer being to provide one or more floating gates for the nonvolatile memory;    (2) forming a dielectric layer over the first layer, wherein forming the dielectric layer comprises: 
 (2A) forming a first silicon oxide layer over the first layer;  
 (2B) processing the first silicon oxide layer with H 2 O 2  and/or NH 4 OH;  
 (2C) after the operation (2B), forming a high-k dielectric layer on the first silicon oxide layer;  
   (3) wherein the method further comprises forming a conductive layer separated from the first layer by the dielectric layer, the conductive layer providing one or more control gates for the nonvolatile memory.    
     
     
         27 . The method of  claim 26  wherein the operation (2B) comprises: 
 (2B-1) processing the first silicon oxide layer with a solution of a mixture of NH 4 OH, H 2 O 2  and deionized water.    
     
     
         28 . The method of  claim 27  wherein the solution is at 45-55° C.  
     
     
         29 . The method of  claim 27  wherein the operation (2B) further comprises: 
 (2B-2) processing the first silicon oxide layer with a solution of HCl, H 2 O 2  and deionized water.    
     
     
         30 . The method of  claim 29  wherein the operation (2B-2) is performed after (2B-1).  
     
     
         31 . The method of  claim 30  wherein the operation (2B) further comprises, between the operations (2B-1) and (2B-2), processing the first silicon oxide layer with a hydrofluoric rinse.  
     
     
         32 . The method of  claim 26  wherein the operation (2B) comprises processing the first silicon oxide layer with a solution of HCl, H 2 O 2  and deionized water.  
     
     
         33 . The method of  claim 26  wherein the high-k dielectric layer comprises aluminum oxide.  
     
     
         34 . The method of  claim 26  wherein the high-k dielectric layer is formed using a chlorine containing precursor.  
     
     
         35 . A method for manufacturing an integrated circuit comprising a nonvolatile memory, the method comprising: 
 (1) forming a first layer, the first layer being to provide one or more floating gates for the nonvolatile memory;    (2) forming a dielectric layer over the first layer, wherein forming the dielectric layer comprises: 
 (2A) forming a silicon oxide layer over the first layer; and  
 (2B) forming a high-k dielectric layer on the first silicon oxide layer;  
   (3) wherein the method further comprises forming a conductive layer separated from the first layer by the dielectric layer, the conductive layer providing one or more control gates for the nonvolatile memory;    wherein forming the high-k dielectric layer is formed using a clorine-containing precursor.