US2006006532A1PendingUtilityA1

Flip-chip without bumps and polymer for board assembly

Assignee: ZUNIGA-ORTIZ EDGAR RPriority: Jan 25, 2002Filed: Jun 27, 2005Published: Jan 12, 2006
Est. expiryJan 25, 2022(expired)· nominal 20-yr term from priority
H10W 74/00H10W 72/9415H10W 72/29H10W 72/012H10W 80/301H10W 72/07236H10W 72/354H10W 72/20H10W 72/07251H10W 72/251H10W 72/221H10W 74/129H10W 74/117H10W 42/20H10W 40/778
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Claims

Abstract

A semiconductor chip having a planar active surface including an integrated circuit protected by an inorganic overcoat; the circuit has metallization patterns including a plurality of contact pads. Each of these contact pads has an added conductive layer on the circuit metallization. This added layer has a conformal surface adjacent the chip, including peripheral portions of the overcoat, and a planar outer surface; this outer surface is suitable to form metallurgical bonds without melting. The chip contact pads may have a distribution arrayed in the center of the chip in close proximity to the chip neutral line; the distribution may leave an area portion of the active chip surface available for attaching a thermally conductive plate. The chip may further have a non-conductive adhesive layer over the overcoat, filling the spaces between the added conductive layers on each contact pad.

Claims

exact text as granted — not AI-modified
1 - 23 . (canceled)  
   
   
       24 . A semiconductor device comprising: 
 a semiconductor chip having a planar active surface including an integrated circuit, said surface having an inorganic protective overcoat and an organic protective overcoat, and said circuit having metallization patterns including a plurality of contact pads;    each of said contact pads having an added conductive layer on said metallization, said added layer having a conformal surface adjacent said chip, including peripheral portions of said overcoats, and a planar outer surface, said outer surface suitable to form metallurgical bonds without melting.    
   
   
       25 . The device according to  claim 24  wherein said organic overcoat is heat-resistant and compliant.  
   
   
       26 . A semiconductor assembly comprising: 
 a semiconductor chip having a planar active surface including an integrated circuit protected by an inorganic overcoat, said circuit having metallization patterns including a plurality of contact pads, each of said contact pads having an added conductive layer on said metallization, said added layer having a conformal surface adjacent said chip and a planar outer surface, said outer surface suitable to form metallurgical bonds without melting; and    an assembly board having a plurality of planar, metallurgically bondable terminal pads in a distribution aligned with the distribution of said chip contact pads;    said chip metallurgically bonded to said board so that each of said chip contact pads is connected to a corresponding board terminal pad.    
   
   
       27 . The assembly according to  claim 26  wherein said assembly board is selected from a group consisting of organic materials. Including FR-4, FR-5, and BT resin, with or without strengthening, thermally modulating fibers, or CTE-matching fillers; metals; and ceramics.  
   
   
       28 . The assembly according to  claim 26  wherein said board terminal pads comprise an outer surface selected from a group consisting of gold, palladium, silver, platinum and alloys thereof.  
   
   
       29 . The assembly according to  claim 26  wherein said metallurgical bonding of said outer layer surface of said contact pads to said terminal pads is selected from a group of techniques and materials comprising: 
 direct welding by metallic interdiffusion;    attachment by solder paste; and    attachment by conductive adhesive.    
   
   
       30 . The assembly according to  claim 26  wherein said semiconductor chip has an additional organic protective overcoat over said inorganic overcoat.  
   
   
       31 . The assembly according to  claim 26  wherein said semiconductor chip has a non-conductive adhesive layer over said overcoat, filling the spaces between said added conductive layers on each of said contact pads and further being attached to said assembly board.  
   
   
       32 . A method for fabricating a semiconductor device comprising a semiconductor chip having a planar active surface including an integrated circuit protected by an inorganic overcoat, and a metallization pattern including a plurality of contact pads, comprising the step of: 
 depositing at least one added conductive layer on said metallization of said contact pads, said added layer having a conformal surface adjacent said chip and a portion of said overcoat, and a planar outer surface, said outer surface suitable to form metallurgical bonds without melting.    
   
   
       33 . The method according to  claim 32  wherein said step of depositing is selected from a group consisting of sputtering, evaporating, and plating.  
   
   
       34 . The method according to  claim 32  wherein said step of fabricating a planar outer surface of said added layer comprises the step of depositing said at least one added conductive layer by electroless plating.  
   
   
       35 . The method according to  claim 32  wherein said step of fabricating a planar outer surface of said added layer comprises the step of depositing said at least one added conductive layer by screen printing.  
   
   
       36 . The method according to  claim 32  wherein said step of fabricating a planar outer surface of said added layer comprises the step of depositing said at least one added conductive layer as connecting bridges between support islands formed of protective overcoat.  
   
   
       37 . A method for fabricating a semiconductor assembly comprising the steps of: providing a semiconductor chip having a planar active surface including an integrated circuit protected by an inorganic overcoat, and a metallization pattern including a plurality of contact pads, each of said contact pads having an added conductive layer on said metallization and a portion of said overcoat, said added layer having a conformal surface adjacent said chip and a planar outer surface, said outer surface suitable to form metallurgical bonds without melting; 
 providing an assembly board having a plurality of planar, metallurgically bondable terminal pads in a distribution aligned with the distribution of said chip contact pads;    aligning said added chip metallization and said board pads so that each of said chip contact pads is connected to a corresponding board terminal pad; and    metallurgically bonding said chip metallization and said board pads.    
   
   
       38 . The method according to  claim 37  wherein said bonding comprises one of the following assembly techniques: 
 direct welding by metallic interdiffusion;    attaching including solder paste;    attaching including a conductive adhesive.

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