Capacitors having a capacitor dielectric layer comprising a metal oxide having multiple different metals bonded with oxygen

Abstract

The invention comprises capacitors having a capacitor dielectric layer comprising a metal oxide having multiple different metals bonded with oxygen. In one embodiment, a capacitor includes first and second conductive electrodes having a high k capacitor dielectric region positioned therebetween. The high k capacitor dielectric region includes a layer of metal oxide having multiple different metals bonded with oxygen. The layer has varying stoichiometry across its thickness. The layer includes an inner region, a middle region, and an outer region. The middle region has a different stoichiometry than both the inner and outer regions.

1 - 31 . (canceled)  
   
   
       32 . A semiconductor device comprising: 
 a substrate comprising a conductive diffusion region;    a first conductive layer in electrical communication with the conductive diffusion region;    a single insulative layer over the first conductive layer and comprising a high k dielectric material, the insulative layer having a thickness and comprising three different metals and a varying stoichiometry of at least one of the metals across the thickness, a first portion of the insulative layer comprising a first concentration of one metal, and a second portion of the insulative layer over the first portion and comprising a second concentration of the one metal which is different from the first concentration, the first portion comprising a dielectric constant which is less than a dielectric constant of the second portion; and    a second conductive layer over the insulative layer.    
   
   
       33 . The device of  claim 32  wherein the one metal comprises barium.  
   
   
       34 . The device of  claim 33  wherein the second concentration of barium is greater than the first concentration.  
   
   
       35 . The device of  claim 32  wherein the one metal comprises strontium.  
   
   
       36 . The device of  claim 35  wherein the second concentration of strontium is greater than the first concentration.  
   
   
       37 . The device of  claim 32  wherein the one metal comprises titanium.  
   
   
       38 . The device of  claim 37  wherein the second concentration of titanium is less than the first concentration.  
   
   
       39 . The device of  claim 32  wherein the semiconductor device is a capacitor comprised by a memory cell.  
   
   
       40 . The device of  claim 32  wherein the semiconductor device is a capacitor comprised by a memory array.  
   
   
       41 . A semiconductor device comprising: 
 a substrate comprising a conductive diffusion region;    a first conductive layer in electrical communication with the conductive diffusion region;    a single insulative layer over the first conductive layer and comprising a high k dielectric material, the insulative layer having a thickness and comprising three different metals and a varying stoichiometry of at least one of the metals across the thickness, a first portion of the insulative layer comprising a first concentration of one metal, and a second portion of the insulative layer over the first portion and comprising a second concentration of the one metal which is different from the first concentration, the first portion comprising a current leakage potential which is greater than a current leakage potential of the second portion; and    a second conductive layer over the insulative layer.    
   
   
       42 . The device of  claim 41  wherein the second concentration of the one metal is less than the first concentration.  
   
   
       43 . The device of  claim 41  wherein the semiconductor device is a capacitor comprised by a memory cell.  
   
   
       44 . The device of  claim 41  wherein the semiconductor device is a capacitor comprised by a memory array.  
   
   
       45 . The device of  claim 41  wherein the one metal comprises titanium.  
   
   
       46 . A method of forming a capacitor comprising: 
 providing a first electrode over a substrate;    forming a dielectric layer over the first electrode and comprising high k dielectric material, the forming of the dielectric layer comprising:    forming a first portion proximate the first electrode;    forming a center portion over the first portion; and    forming a third portion over the center portion, the center portion comprising a thickness which is substantially the same as a thickness of at least one of the first and third portions, and at least one of the portions comprising a dielectric constant and/or a current leakage potential that is different from at least one of the other two portions; and    providing a second electrode over the third portion of the dielectric layer.    
   
   
       47 . The method of  claim 46  wherein the first portion comprises a thickness which is substantially the same as the thickness of the center portion.  
   
   
       48 . The method of  claim 46  wherein the second portion comprises a thickness which is substantially the same as the thickness of the center portion.  
   
   
       49 . The method of  claim 46  wherein the first and second portions comprise respective thicknesses which are substantially the same as the thickness of the center portion.  
   
   
       50 . The method of  claim 46  wherein the center portion comprises a dielectric constant that is greater than respective dielectric constants of the first and third portions.  
   
   
       51 . The method of  claim 46  wherein the center portion comprises a current leakage potential that is less than respective current leakage potentials of the first and third portions.  
   
   
       52 . The method of  claim 46  wherein the first portion comprises a current leakage potential that is substantially the same as a current leakage potential of the third portion.  
   
   
       53 . The method of  claim 46  wherein the capacitor is comprised by a memory cell.  
   
   
       54 . The method of  claim 46  wherein the capacitor is comprised by a memory array.