US2006006384A1PendingUtilityA1

Special contact points for accessing internal circuitry of an intergrated circuit

Assignee: FORMFACTOR INCPriority: Dec 31, 1998Filed: Sep 6, 2005Published: Jan 12, 2006
Est. expiryDec 31, 2018(expired)· nominal 20-yr term from priority
H10W 72/932H10W 72/29H10W 72/20H10W 72/07251H10P 74/273H10W 72/00H10W 42/60G01R 1/07307G01R 31/2884G01R 31/31723
50
PatentIndex Score
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Claims

Abstract

One embodiment of the present invention concerns an integrated circuit that includes bond pads and special contact pads or points. The bond pads are for interfacing the integrated circuit as a whole with an external circuit, and are to be bonded to a package or circuit board. The bond pads are disposed on the die in a predetermined alignment such as a peripheral, grid, or lead-on-center alignment. The special contact pads are used to provide external test patterns to internal circuits and/or to externally monitor results from testing the internal circuits. The special contact pads may be advantageously located on the integrated circuit with a high degree of positional freedom. For one embodiment, the special contact pads may be disposed on the die at a location that is not in the same alignment as the bond pads. The special contact pads may be smaller than the bond pads so as not to increase the die size due to the special contact pads. The special contact points may also be used to externally program internal circuits (e.g., nonvolatile circuits) at the die or package level. The special contact points may also be used to select redundant circuits for faulty circuits.

Claims

exact text as granted — not AI-modified
1 - 65 . (canceled)  
   
   
       66 . An integrated circuit comprising: 
 a first input/output buffer circuit;    a second input/output buffer circuit smaller than said first input/output buffer circuit;    a first contact structure electrically connected to said first input/output buffer circuit; and    a special contact structure electrically connected to said second input/output buffer circuit.    
   
   
       67 . The integrated circuit of  claim 66  further comprising: 
 first discharge protection means for protecting said integrated circuit from electrostatic discharge through said first contact structure, said first discharge protection means sized to protect against electrostatic discharge up to a first level of discharge; and    second discharge protection means for protecting said integrated circuit from electrostatic discharge through said special contact structure, said second discharge protection means sized to protect against electrostatic discharge up to a second level of discharge,    wherein said second level of discharge is less than said first level of discharge.    
   
   
       68 . The integrated circuit of  claim 66 , wherein said special contact structure is smaller than said first contact structure.  
   
   
       69 . The integrated circuit of  claim 66 , wherein said first contact structure and said special contact structure are disposed on a surface of said integrated circuit, and a height of said special contact structure from said surface is less than a height of said first contact structure from said surface.  
   
   
       70 . The integrated circuit of  claim 66 , wherein said first contact structure is adapted to provide electrical connections between said first input/output buffer circuit and a printed circuit board.  
   
   
       71 . The integrated circuit of  claim 66  further comprising: 
 a plurality of said first input/output buffer circuits; and    a plurality of said first contact structures.    
   
   
       72 . The integrated circuit of  claim 71  further comprising: 
 a plurality of said second input/output buffer circuits; and    a plurality of said special contact structures.    
   
   
       73 . An integrated circuit comprising: 
 first discharge protection means for protecting said integrated circuit from electrostatic discharge, said first discharge protection means sized to protect against electrostatic discharge up to a first level of discharge;    second discharge protection means for protecting said integrated circuit from electrostatic discharge, said second discharge protection means sized to protect against electrostatic discharge up to a second level of discharge, wherein said second level of discharge is less than said first level of discharge;    a first contact structure electrically connected to said first electrostatic discharge protection means; and    a special contact structure electrically connected to said second electrostatic discharge protection means.    
   
   
       74 . The integrated circuit of  claim 73 , wherein said special contact structure is smaller than said first contact structure.  
   
   
       75 . The integrated circuit of  claim 73 , wherein said first contact structure and said special contact structure are disposed on a surface of said integrated circuit, and a height of said special contact structure from said surface is less than a height of said first contact structure from said surface.  
   
   
       76 . The integrated circuit of  claim 73  further comprising a plurality of said first contact structures.  
   
   
       77 . The integrated circuit of  claim 76  further comprising a plurality of said special contact structures.  
   
   
       78 . An integrated circuit comprising: 
 a first circuit block;    a second circuit block that is redundant of said first circuit block;    selecting means for selecting one of said second circuit block or said first circuit block;    a special contact structure electrically connected to said selecting means.    
   
   
       79 . The integrated circuit of  claim 78 , wherein said special contact structure is smaller than said first contact structure.  
   
   
       80 . The integrated circuit of  claim 78 , wherein said first contact structure and said special contact structure are disposed on a surface of said integrated circuit, and a height of said special contact structure from said surface is less than a height of said first contact structure from said surface.  
   
   
       81 . The integrated circuit of  claim 78  further comprising an additional special contact structure electrically connected to said first circuit block for monitoring operation of said first circuit block.  
   
   
       82 . The integrated circuit of  claim 78  further comprising a plurality of said first contact structures.

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