Semiconductor device and manufacturing method thereof

Abstract

An N− layer is formed on a semiconductor substrate, with a BOX layer interposed. In the N− layer, a trench isolation region is formed to surround the N− layer to be an element forming region. The trench isolation region is formed to reach the BOX layer, from the surface of the N− layer. Between trench isolation region and the N− layer, a P type diffusion region 10 a is formed. The P type diffusion region is formed continuously without any interruption, to be in contact with the entire surface of an inner sidewall of the trench isolation region surrounding the element forming region. In the element forming region of the N− layer, a prescribed semiconductor element is formed. Thus, a semiconductor device is formed, in which electrical isolation is established reliably, without increasing the area occupied by the element forming region.

1 . A semiconductor device, comprising: 
 an insulating film formed on a main surface of a prescribed substrate;    a semiconductor layer of a first conductivity type formed on said insulating film;    an isolation region, continuously surrounding a prescribed region to be an element forming region in said semiconductor layer, formed from the surface of said semiconductor layer to a surface of said insulating film and having an inner sidewall and an outer sidewall; and    a first impurity region of a second conductivity type formed continuously to be in contact with an entire surface of said inner sidewall of said isolation region, positioned between a portion of said semiconductor layer positioned in said prescribed region and said isolation region.    
   
   
       2 . The semiconductor device according to  claim 1 , further comprising 
 a first electrode formed to be electrically connected to said first impurity region for holding said first impurity region at a prescribed potential.    
   
   
       3 . The semiconductor device according to  claim 1 , further comprising 
 another prescribed region to be another element forming region positioned outside said isolating region in said semiconductor layer; and    a second impurity region of the second conductivity type formed to be in contact with an entire surface of said outer sidewall of said isolation region, and positioned between a portion of said semiconductor layer positioned in said another prescribed region and said isolation region.    
   
   
       4 . The semiconductor device according to  claim 3 , further comprising 
 a second electrode formed to be electrically connected to said second impurity region for holding said second impurity region at a prescribed potential.    
   
   
       5 . The semiconductor device according to  claim 1 , further comprising 
 an element formed in said prescribed region.    
   
   
       6 . The semiconductor device according to  claim 5 , wherein 
 said element formed in said region is a transistor including    a source region,    a drain region    a body region to be a channel, and    a gate formed on said body region with a gate insulating film interposed; and    said first impurity region includes either said body region or said drain region.    
   
   
       7 . The semiconductor device according to  claim 5 , wherein 
 said element formed in said region is a diode including    a cathode region, and    an anode region; wherein    said first impurity region includes either said anode region or said cathode region.    
   
   
       8 . The semiconductor device according to  claim 5 , wherein 
 said element formed in said region is a bipolar transistor, including    an emitter region,    a collector region, and    a base region; wherein    said first impurity region includes either said base region or said collector region.    
   
   
       9 . The semiconductor device according to  claim 1 , wherein 
 said first impurity region is formed to have a prescribed impurity concentration so that an end of a depletion layer extending from an interface between said first impurity region and a portion of said semiconductor layer positioned in said prescribed region does not reach said isolation region during an operation.    
   
   
       10 . The semiconductor device according to  claim 5 , wherein 
 said first impurity region has an impurity concentration set to be higher than that of said element forming region.    
   
   
       11 . The semiconductor device according to  claim 5 , further comprising: 
 a well region formed in said prescribed region and having at least one of said first conductivity type and said second conductivity type-, and    another insulating film formed on said semiconductor layer to expose a surface of said well region; wherein    as said element, a transistor including    source and drain regions of opposite conductivity type to said well region, and    a gate electrode portion is formed in said exposed well region.    
   
   
       12 . The semiconductor device according to  claim 11 , wherein 
 said gate electrode portion includes    a lower electrode,    a dielectric film formed on said lower electrode, and    an upper electrode formed on said dielectric film.    
   
   
       13 . A method of manufacturing a semiconductor device, comprising the steps of 
 on a semiconductor layer of a first conductivity type formed on a prescribed    substrate with an insulating film interposed, forming a trench to continuously surround a region to be an element forming region and to expose a surface of said insulating film;    on an entire surface of that portion of said semiconductor layer exposed in said trench, which is at least on the side where the prescribed region is positioned, introducing an impurity of a second conductivity type, so as to form a first impurity region of the second conductivity type; and    filling said trench with an insulating material.    
   
   
       14 . The method of manufacturing a semiconductor device according to  claim 13 , further comprising the step of 
 forming a prescribed element by introducing a prescribed amount of impurity to said region to be the element forming region; wherein    in said step of forming the first impurity region, an impurity of a larger amount than said prescribed amount is introduced.    
   
   
       15 . The method of manufacturing a semiconductor device according to  claim 13 , wherein 
 said step of forming said first impurity region includes the step of introducing an impurity by oblique ion implantation.