Phase locked loop circuit

Abstract

A phase locked loop circuit includes a loop filter having a first input terminal and a second input terminal and including a first capacitor coupled to the first terminal; a resistor having one terminal coupled to the first input terminal; a second capacitor coupled to the second input terminal; and a source follower having an input terminal coupled to the second input terminal and an output terminal coupled the other terminal of the resistor; a first charge pump coupled to the first input terminal outputting a first current; and a second charge pump coupled to the second input terminal outputting a second current; wherein the first current is a multiple of the second current.

1 . A phase locked loop circuit comprising: 
 a loop filter having a first input terminal and a second input terminal and comprising: 
 a first capacitor coupled to the first terminal;  
 a resistor having one terminal coupled to the first input terminal;  
 a second capacitor coupled to the second input terminal; and  
 a source follower having an input terminal coupled to the second input terminal and an output terminal coupled the other terminal of the resistor;  
   a first charge pump coupled to the first input terminal outputting a first current; and    a second charge pump coupled to the second input terminal outputting a second current;    wherein the first current is a multiple of the second current.    
   
   
       2 . The phase locked loop circuit as claimed in  claim 1 , further comprising a current source coupled to the output terminal of the source follower.  
   
   
       3 . The phase locked loop circuit as claimed in  claim 1 , further comprising a voltage controlled oscillator coupled to the output terminal of the loop filter.  
   
   
       4 . The phase locked loop circuit as claimed in  claim 3 , further comprising a first frequency divider coupled to the output terminal of the voltage controlled oscillator outputting a feedback signal.  
   
   
       5 . The phase locked loop circuit as claimed in  claim 5 , further comprising a phase detector having two input terminals respectively coupled to the output terminal of the first frequency divider and a second frequency divider, and two output terminals respectively connected to the first charge pump and the second charge pump.  
   
   
       6 . The phase locked loop circuit as claimed in  claim 1 , wherein the source follower comprises a drain connected to a fixed voltage source, a gate as the input terminal coupled to the output terminal of the second charge pump and a source connected to the other terminal of the resistor.