US2005280100A1PendingUtilityA1

Laterally diffused MOS device

Assignee: ARTAKI MICHAELPriority: Jun 17, 2004Filed: Jun 17, 2004Published: Dec 22, 2005
Est. expiryJun 17, 2024(expired)· nominal 20-yr term from priority
H10D 30/603H10D 64/663H10D 64/661H10D 62/393H10D 30/0281H10D 30/0221H10D 30/65H10D 62/307
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Claims

Abstract

Significant improvement in gain is achievable in a laterally diffused MOS device without substantial change in threshold voltage. Such improvement in a device having a channel with lateral dopant gradient of at least a factor of 10 per micrometer of channel is attained using a P-type gate. For example, a g m of 0.02 S/mm (at VDS=28 V) and a drain breakdown of more than 70V with gate oxide of 350 Å is possible with a threshold voltage of 3.5 volts.

Claims

exact text as granted — not AI-modified
1 . A device formed on a substrate, said device comprising a source region in electrical communication with, a drain region through a channel that is separated from a gate electrode that controls electrical conduction in said channel by a gate dielectric wherein said channel has a lateral concentration gradient of p-type dopant that is at least a factor of 10 per micrometer of channel length, wherein said gate electrode is P-type, and wherein the distance between said drain region and channel region is in the range 0.5 to 3 μm.  
   
   
       2 . The device of  claim 1  wherein said gate electrode is P-type due to the presence of a boron, indium or gallium species.  
   
   
       3 . The device of  claim 1  wherein said gate electrode comprises a metal silicide.  
   
   
       4 . The device of  claim 3  wherein said silicide comprises titanium silicide, tungsten silicide, cobalt silicide, or nickel silicide.  
   
   
       5 . The device of  claim 1  wherein said gate comprises polysilicon.  
   
   
       6 . The device of  claim 1  wherein the dopant in said channel comprises a boron species.  
   
   
       7 . The device of  claim 1  wherein said device comprises a lateral diffusion MOS device.  
   
   
       8 . The device of  claim 7  wherein said channel comprises silicon and said gate dielectric comprises an oxide.

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