Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor device

Abstract

A multi-layered structure of a semiconductor device includes a substrate, and a heteroepitaxial layer having a low dislocation defect density on the substrate. The heteroepitaxial layer consists of a main epitaxial layer and at least one intermediate epitaxial layer sandwished in the main epitaxial layer. At their interface, the heteroepitaxial layer, i.e., the bottom portion of the main epitaxial layer, and the substrate have different lattice constants. Also, the intermediate epitaxial layer has a different lattice constant from that of the portions of the main epitaxial layer contiguous to the intermediate epitaxial layer. The intermediate epitaxial layer also has a thickness smaller than the net thickness of the main epitaxial layer such that the intermediate epitaxial layer absorbs the strain in the heteroepitaxial layer. Thus, it is possible to obtain a multi-layered structure comprising an epitaxial layer that is relatively thin and has a low dislocation defect density.

1 - 24 . (canceled)  
     
     
         25 . A method of fabricating a semiconductor device, comprising: 
 providing a substrate;    forming a heteroepitaxial layer on the substrate by forming a main epitaxial layer having a bottom surface on said substrate, and a top surface, the lattice constant of the main epitaxial layer being different from that of the substrate, and forming at least one intermediate epitaxial layer that is situtated within the main epitaxial layer above said bottom surface and beneath said top surface, the intermediate epitaxial layer having a lattice constant different from that of portions of the main epitaxial layer interfacing with the intermediate epitaxial layer, and the thickness of the intermediate epitaxial layer being smaller than the net thickness of the main epitaxial layer;    annealing said heteroepitaxial layer, whereby the intermediate epitaxial layer absorbs the strain imposed on the heteroepitaxial layer by said annealing; and    forming on the annealed heteroepitaxial layer a channel layer having a lattice constant different from that of said heteroepitaxial layer at the top surface of said main epitaxial layer.    
     
     
         26 . The method according to  claim 25 , and further comprising polishing the substrate on which the heteroepitaxial layer is formed using a chemical mechanical polishing (CMP) process before forming the channel layer.  
     
     
         27 . The method according to  claim 25 , wherein the heteroepitaxial layer is formed by ultrahigh vacuum chemical vapor deposition (UHVCVD), reduced pressure chemical vapor deposition (RPCVD), a low pressure chemical vapor deposition (LPCVD), or molecular beam epitaxy (MBE).  
     
     
         28 . The method according to  claim 25 , wherein said forming of the main epitaxial layer comprises varying the composition thereof from its bottom surface to its top surface.  
     
     
         29 . The method according to  claim 28 , and further comprising forming a uniform epitaxial layer having a uniform composition throughout on the heteroepitaxial layer before forming the channel layer, and wherein the composition of the uniform epitaxial layer is the same as that of the main epitaxial layer at the top surface thereof.  
     
     
         30 . The method according to  claim 25 , wherein the main epitaxial layer is formed so as to have a uniform composition throughout.  
     
     
         31 . The method according to  claim 25 , wherein said forming of the main epitaxial layer comprises forming a layer of Si 1-x Ge x  (0<X<1) on the substrate.  
     
     
         32 . The method according to  claim 31 , wherein the substrate provided is a monocrystalline silicon substrate, and said main epitaxial layer is formed such that the value of X is 0 at the bottom surface of the main epitaxial layer and varies in a graduated manner from the bottom surface to the top surface thereof.  
     
     
         33 . The method according to  claim 32 , wherein the main epitaxial layer is formed such that the value of X is 0.2 or more at the top surface thereof.  
     
     
         34 . The method according to  claim 31 , wherein the main epitaxial layer is formed such that the value of X is constant throughout.  
     
     
         35 . The method according to  claim 34 , wherein the main epitaxial layer is formed such that the value of X is 0.2 or more.  
     
     
         36 . The method according to  claim 25 , wherein the intermediate epitaxial layer is formed such that its composition is uniform throughout.  
     
     
         37 . The method according to  claim 25 , wherein said forming of the intermediate epitaxial layer consists of forming a layer of Si, SiC, or SiGeC.  
     
     
         38 . The method according to  claim 25 , wherein the heteroepitaxial layer is formed such that the sum of the thicknesses of the at least one intermediate epitaxial layer is ½ or less of the net thickness of the main epitaxial layer.  
     
     
         39 . The method according to  claim 25 , wherein the channel layer is formed of a material having a lattice constant smaller than that of the heteroepitaxial layer at the top surface of said main epitaxial layer.  
     
     
         40 . The method according to  claim 25 , wherein said forming of a channel layer comprises forming the channel layer of Si or SiC.