Semiconductor integrated circuit device, and adjustment method of semiconductor integrated circuit device
Abstract
It is intended to provide a semiconductor integrated circuit device and adjustment method of the same semiconductor integrated circuit device, capable of adjusting an analog signal outputted from an incorporated analog signal generating section without outputting it outside as an analog value. An analog signal AOUT is outputted from an analog signal generating section 3 in which an adjustment signal AD is inputted. The analog signal AOUT is inputted to a judgment section 1, in which it is compared and judged with a predetermined value and then a judgment signal JG is outputted. The judgment signal JG acts on a predetermined signal storing section 4 as an internal signal and the adjustment signal AD is fetched into the predetermined signal storing section 4. Further, the judgment signal JG is outputted as digital signal through an external terminal T 2 and an external tester device acquires the adjustment signal and stores the acquired adjustment signal in the predetermined signal storing section 4. Consequently, the analog signal can be adjusted as analog value without being outputted outside and an adjustment test can be carried out with a simple tester device and according to a simple test method accurately and rapidly.
Claims
exact text as granted — not AI-modified1 . A semiconductor integrated circuit device comprising:
an analog signal generating section for outputting an analog signal; and a predetermined signal storing section for storing at least one predetermined signal that is supplied to the analog signal generating section and sets the analog signal to a predetermined value, wherein digital signals are used for input/output interface to external terminals, and the semiconductor integrated circuit device further comprises virtual load section for varying load against the analog signal in response to a load setting signal to be supplied.
2 . A semiconductor integrated circuit device according to claim 1 , wherein the analog signal generating section is an internal power source voltage generating section and outputs internal power source voltage as the analog signal, and the load is a current source circuit for generating load current.
3 . An adjustment method of a semiconductor integrated circuit device that generates an analog signal having a predetermined value based on at least one predetermined signal stored and uses digital signals for input/output interface to external terminals, the adjustment method adjusting the analog signal through a virtual load step for varying load against the analog signal in accordance with a load setting signal.Join the waitlist — get patent alerts
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