Integrated circuit structure formed by damascene process

Abstract

An integrated circuit structure is formed using a damascene process that involves forming a trench or cavity for the structure in a temporary layer of material. A conductive material, such as copper, can then be deposited on the temporary layer to overfill the trench or cavity, and the excess conductive material can be removed by polishing down to the surface of the temporary layer. The integrated circuit structure can then be exposed by removing the temporary layer. One example of an integrated circuit structure that can be formed using this method is an upper electrode in an MRAM array. By using the process to form an upper electrode in an MRAM array, the process of forming a magnetic keeper around the upper electrode is advantageously simplified.

1 . A magnetic memory device in an integrated circuit, comprising: 
 a lower electrode formed over a semiconductor substrate;    a magnetic memory cell formed over the lower electrode;    an upper electrode with a bottom surface facing toward the magnetic memory cell, a top surface facing away from the magnetic memory cell and two side surfaces facing away from the magnetic memory cell; and    a magnetic keeper comprising at least one unitary layer of magnetic material completely covering the top surface and the two side surfaces of the upper electrode.    
   
   
       2 . The magnetic memory device of  claim 1 , wherein the magnetic memory cell comprises a multi-layer tunneling magnetoresistance (TMR) structure.  
   
   
       3 . The magnetic memory device of  claim 1 , wherein the magnetic memory cell comprises a multi-layer giant magnetoresistance (GMR) structure.  
   
   
       4 . The magnetic memory device of  claim 1 , wherein the upper electrode comprises a conductive line formed in a damascene trench.  
   
   
       5 . The magnetic memory device of  claim 4 , wherein the conductive line comprises copper.  
   
   
       6 . The magnetic memory device of  claim 5 , wherein the conductive line has substantially vertical sidewalls.  
   
   
       7 . The magnetic memory device of  claim 5 , wherein the width of the conductive line falls within the range of about 50 nm to about 300 nm.  
   
   
       8 . The magnetic memory device of  claim 4 , further comprising a layer of a barrier material disposed at least on the bottom surface of the upper electrode.  
   
   
       9 . The magnetic memory device of  claim 8 , wherein the layer of the barrier material is further disposed on the side surfaces of the upper electrode.  
   
   
       10 . The magnetic memory device of  claim 9 , further comprising a second layer of the barrier material disposed over the unitary layer of magnetic material, where the second layer is unitary.  
   
   
       11 . The magnetic memory device of  claim 10 , wherein the upper electrode comprises copper, and the barrier material is tantalum or tantalum nitride.  
   
   
       12 . The magnetic memory device of  claim 8 , wherein the upper electrode comprises copper, and the barrier material comprises tantalum.  
   
   
       13 . The magnetic memory device of  claim 8 , wherein the upper electrode comprises copper, and the barrier material comprises tantalum nitride.  
   
   
       14 . The magnetic memory device of  claim 1 , wherein the magnetic material of the magnetic keeper comprises permalloy or Co—Fe.  
   
   
       15 . The magnetic memory device of  claim 1 , wherein the magnetic keeper further comprises a barrier layer comprising a unitary layer of material over the unitary layer of magnetic material.  
   
   
       16 . The magnetic memory device of  claim 15 , wherein the barrier layer comprises tantalum.  
   
   
       17 . The magnetic memory device of  claim 15 , wherein the barrier layer comprises tantalum nitride.  
   
   
       18 . The magnetic memory device of  claim 1 , wherein a top surface of the magnetic memory cell is in electrical contact with the upper electrode.  
   
   
       19 . The magnetic memory device of  claim 1 , wherein the top surface of the upper electrode is flat.  
   
   
       20 . The magnetic memory device of  claim 1 , wherein the unitary layer of magnetic material for the magnetic keeper has a cross-sectional profile without discontinuities.  
   
   
       21 . The magnetic memory device of  claim 1 , wherein the unitary layer of magnetic material for the magnetic keeper has a convex shape at corners defined by the top surface and side surfaces of the upper electrode when viewed from a side of the magnetic keeper opposite the upper electrode.  
   
   
       22 . An integrated circuit element comprising: 
 a copper structure having a top surface and at least two side surfaces; and    a multi-layer coating comprising at least a first continuous layer of a first material and a second continuous layer of a second material different from the first material, the multi-layer coating adjacent to the top surface and extending completely down at least two side surfaces of the copper structure.    
   
   
       23 . The magnetic memory device of  claim 22 , wherein the multi-layer coating has a cross-sectional profile without discontinuities.  
   
   
       24 . The magnetic memory device of  claim 22 , wherein the multi-layer coating has a convex shape at corners defined by the top surface and side surfaces of the upper electrode when viewed from a side of the magnetic keeper opposite the upper electrode.  
   
   
       25 . The magnetic memory device of  claim 22 , wherein the first continuous layer of the first material comprises a barrier layer and the second continuous layer of the second material comprises a magnetic material.  
   
   
       26 . The magnetic memory device of  claim 22 , wherein the copper structure comprises a conductive line of copper having a barrier layer disposed along a bottom surface and the two side surfaces.  
   
   
       27 . A magnetic memory device in an integrated circuit, comprising: 
 a lower electrode formed over a semiconductor substrate;    a magnetic memory cell formed over the lower electrode;    an upper electrode of copper with a bottom surface facing toward the magnetic memory cell, a top surface facing away from the magnetic memory cell and two side surfaces facing away from the magnetic memory cell; and    a magnetic keeper comprising at least one layer of magnetic material completely covering the top surface and the two side surfaces of the upper electrode, wherein the layer of magnetic material for the magnetic keeper has a convex shape at corners defined by the top surface and side surfaces of the upper electrode when viewed from a side of the magnetic keeper opposite the upper electrode.    
   
   
       28 . The magnetic memory device of  claim 27 , wherein the top surface of the upper electrode is flat.  
   
   
       29 . The magnetic memory device of  claim 27 , further comprising a barrier layer of tantalum or tantalum nitride disposed between the bottom surface of the upper electrode and the magnetic memory cell.  
   
   
       30 . The magnetic memory device of  claim 29 , wherein the barrier layer is further disposed between the side surfaces of the upper electrode and the magnetic keeper.  
   
   
       31 . The magnetic memory device of  claim 31 , further comprising a second barrier layer disposed outside the magnetic keeper.  
   
   
       32 . The magnetic memory device of  claim 27 , further comprising a barrier layer disposed outside the magnetic keeper.