Method and apparatus for power management of graphics processors and subsystems thereof

Abstract

A graphics processing device implementing a set of techniques for power management, preferably at both a subsystem level and a device level, and preferably including peak: power management, a system including a graphics processing device that implements such a set of techniques for power management, and the power management methods performed by such a device or system. In preferred embodiments, the device includes at least two subsystems and hardware mechanisms that automatically seek the lowest power state for the device that does not impact performance of the device or of a system that includes the device. Preferably, the device includes a control unit operable in any selected one of multiple power management modes, and system software can intervene to cause the control unit to operate in any of these modes. For example, the device can include a register interface to which an external processor can write control bits to select among the modes. Preferably, the control unit is operable in a subsystem power management mode in which the hardware mechanisms prevent assertion of clocks to idle subsystems, and disable generation of clocks that are not used by non-idle subsystems, or a device power management mode in which power consumption is controlled at levels of broader scope than individual subsystems, such as by disabling generation of a device clock, preventing assertion of a device dock to circuitry of the device, controlling device clock frequencies, and controlling voltage regulators employed to provide power to the device. Peak power management in accordance with the invention is designed to artificially limit the peak power drawn by the device to a predetermined thermal design point by dynamically lowering clock frequencies or voltage or both when power consumption exceeds a threshold. The invention can be implemented to reduce power consumption in mobile computing systems and is also applicable to desktop systems for example to manage peak power requirements.

1 . A system, including: 
 a system bus;    a CPU connected along the system bus;    the graphics processing device being connected along the system bus; and    at least one input device connected along the system bus,    wherein at least one of the CPU and the graphics processing device are configured to operate in a frame generation mode in which frames of image data are generated by the graphics processing device at a selected frame rate and the CPU is configured to respond to control data asserted from the input device over the system bus by causing the device to enter the frame generation mode, where the control data determines the selected frame rate.    
   
   
       2 . The system of  claim 1 , wherein the set of predetermined frame rates includes a maximum frame rate and a reduced frame rate, the graphics processing device generates pixels of the image data a first pixel rate when operating in the frame generation mode with the selected frame rate equal to the maximum frame rate, and the graphics processing device generates pixels of the image data at said first pixel rate but with idle time between generation of at least two subsets of the pixels when operating in the frame generation mode with the selected frame rate equal to the reduced frame rate.  
   
   
       3 . The system of  claim 2  wherein each of the subsets of pixels comprises a line of image data.  
   
   
       4 . The system of  claim 2  wherein each of the subsets of pixels comprises a block of lines of image data.  
   
   
       5 . The system of  claim 2  wherein each of the subsets of pixels comprises a field of image data.  
   
   
       6 . The system of  claim 2  wherein each of the subsets of pixels comprises a frame of image data.  
   
   
       7 . The system of  claim 2  wherein both of the CPU and the graphics processing device operate at the selected frame rate.  
   
   
       8 . The system of  claim 2  including an application programming interface including driver software having a user interface allowing the user to select the frame rate from a predetermined range of frame rates.  
   
   
       9 . The system of  claim 2  including an application programming interface including driver software having a user interface allowing the user to select the frame rate from a predetermined set of frame rates.  
   
   
       10 . The system of  claim 2  wherein the idle time comprises a vertical blanking interval between the generation of at least two subsets of pixels.  
   
   
       11 . The system of  claim 2  further comprising a display connected along the system bus, the display receiving the image data at the selected frame rate.  
   
   
       12 . The system of  claim 11  wherein the idle time comprises a vertical blanking interval between the generation of at least two subsets of pixels.  
   
   
       13 . The system of  claim 11  wherein the display is a liquid crystal display.  
   
   
       14 . The system of  claim 13  wherein the graphics processing device is configured to operate in any selected one of a first mode and a second mode, wherein the display is refreshed in the first mode by asserting a frame of image data to the display at a first rate Rn, and wherein the display is refreshed in the second mode by asserting a frame of image data to the display at a second rate Rr, where Rr is less than Rn.  
   
   
       15 . The system of  claim 14  wherein the display comprises cells, and the cells require a minimum time, T, to change state, where T is greater than (Rn) −1  but T is less than (Rr) −1 .  
   
   
       16 . The system of  claim 11  wherein the display is a backlit display including a backlight, wherein the graphics processing device is configured to drive the backlight with any selected one of at least two predetermined duty cycles.  
   
   
       17 . A system, including: 
 a system bus;    a CPU connected along the system bus;    a graphics processing device being connected along the system bus; and    a liquid crystal display connected along the system bus,    wherein at least one of the CPU and the graphics processing device is configured to operate in any selected on of a first mode and a second mode, where the display is refreshed in the first mode by asserting a frame of image data to the display at a first rate Rn, and wherein the display is refreshed in the second mode by asserting a frame of image data to the display at a second rate Rr, where Rr is less than Rn.    
   
   
       18 . The system of  claim 17  wherein the display comprises cells, and the cells require a minimum time, T, to change state, where T is greater than (Rn) −1  but T is less than (Rr) −1 .  
   
   
       19 . A system, including: 
 a system bus;    a CPU connected along the system bus;    a graphics processing device being connected along the system bus; and    a backlit display connected along the system bus, wherein the backlit display includes a backlight,    wherein at least one of the CPU and the graphics processing device is configured to drive the backlight with any selected one of at least two predetermined duty cycles.