Non-volatile semiconductor memory device and method of fabricating thereof
Abstract
A phosphorus-doped amorphous silicon film and a silicon nitride film are serially grown over a semiconductor substrate. The obtained stack is patterned so as to obtain word lines. A CVD oxide film is grown on the entire surface and then anisotropically etched to thereby form sidewalls on the lateral faces of the word lines. An ONO film previously formed just under the CVD oxide film is also removed by the etching. The semiconductor substrate is etched to thereby form a groove, where masking is effected by the silicon nitride film, silicon oxide film and sidewall. Boron ions are doped by ion implantation through the same mask into the bottom of the groove to thereby form a channel stop impurity-diffused layer. Then, an inter-layer insulating film is formed over the entire surface.
Claims
exact text as granted — not AI-modified1 - 12 . (canceled)
13 . A method of fabricating a non-volatile semiconductor memory device comprising the steps of:
forming a stack comprised of a first oxide film, a nitride film and a second oxide film stacked in this order on a semiconductor substrate; forming a plurality of bit lines comprised of an impurity-diffused layer in the surficial portion of said semiconductor substrate; forming a first insulating film on said plurality of bit lines; successively forming a conductive layer and a second insulating layer over the entire surface; patterning said conductive layer and said second insulating film so as to obtain a plurality of word lines crossing in a plan view with said plurality of bit lines; forming sidewalls comprised of a third insulating film on the lateral faces of said word lines; forming a groove by etching the surface of said semiconductor substrate, where masking is effected by said first insulating film, second insulating film and sidewalls; forming a channel stop impurity-diffused layer at the bottom of said groove by ion implantation; and filling said groove with a fourth insulating film.
14 . A method of fabricating a non-volatile semiconductor memory device comprising the steps of:
forming a stack comprised of a first oxide film, a nitride film and a second oxide film stacked in this order on a semiconductor substrate; forming a plurality of bit lines comprised of an impurity-diffused layer in the surficial portion of said semiconductor substrate; forming a first insulating film on said plurality of bit lines; successively forming a conductive layer and a second insulating layer over the entire surface; patterning said conductive layer and said second insulating film so as to obtain a plurality of word lines crossing in a plan view with said plurality of bit lines; forming a groove by etching the surface of said semiconductor substrate, where masking is effected by said first insulating film and second insulating film; forming a channel stop impurity-diffused layer at the bottom of said groove by ion implantation; forming sidewalls which are comprised of a third insulating film and extend toward the bottom of said groove on the lateral faces of said word lines; and filling said groove with a fourth insulating film.
15 . A method of fabricating a non-volatile semiconductor memory device comprising the steps of:
forming a stack comprised of a first oxide film, a nitride film and a second oxide film stacked in this order on a semiconductor substrate; forming a plurality of bit lines comprised of an impurity-diffused layer in the surficial portion of said semiconductor substrate; forming a first insulating film on said plurality of bit lines; successively forming a conductive layer and a second insulating layer over the entire surface; patterning said conductive layer and said second insulating film so as to obtain a plurality of word lines crossing in a plan view with said plurality of bit lines; forming a resist film which covers said conductive layer and said second insulating film, and has openings in a plan view in the areas between every adjacent word lines and apart from said word lines; forming a groove by etching the surface of said semiconductor substrate, where masking is effected by said first insulating film and said resist film; forming a channel stop impurity-diffused layer at the bottom of said groove by ion implantation; and filling said groove with a fourth insulating film.
16 . A method of fabricating a non-volatile semiconductor memory device comprising the steps of:
forming a tunnel insulating film on a semiconductor substrate; forming a plurality of bit lines comprised of an impurity-diffused layer in the surficial portion of said semiconductor substrate; forming a first insulating film on said plurality of bit lines; forming a floating gate on said tunnel insulating film and said first insulating film; forming a stack comprised of a first oxide film, a nitride film and a second oxide film stacked in this order on said floating gate; successively forming a conductive layer and a second insulating film over the entire surface; patterning said conductive layer and said second insulating film so as to obtain a plurality of word lines crossing in a plan view with said plurality of bit lines; forming sidewalls comprised of a third insulating film on the lateral faces of said word lines; forming a groove by etching the surface of said semiconductor substrate, where masking is effected by said first insulating film, second insulating film and sidewalls; forming a channel stop impurity-diffused layer at the bottom of said groove by ion implantation; and filling said groove with a fourth insulating film.
17 . A method of fabricating a non-volatile semiconductor memory device comprising the steps of:
forming a tunnel insulating film on a semiconductor substrate; forming a plurality of bit lines comprised of an impurity-diffused layer in the surficial portion of said semiconductor substrate; forming a first insulating film on said plurality of bit lines; forming a floating gate on said tunnel insulating film and said first insulating film; forming a stack comprised of a first oxide film, a nitride film and a second oxide film stacked in this order on said floating gate; successively forming a conductive layer and a second insulating film over the entire surface; patterning said conductive layer and said second insulating film so as to obtain a plurality of word lines crossing in a plan view with said plurality of bit lines; forming a groove by etching the surface of said semiconductor substrate, where masking is effected by said first insulating film and second insulating film; forming a channel stop impurity-diffused layer at the bottom of said groove by ion implantation; forming sidewalls which are comprised of a third insulating film and extend toward the bottom of said groove on the lateral faces of said word lines; and filling said groove with a fourth insulating film.
18 . The method of fabricating a non-volatile semiconductor memory device according to claim 14 , further comprising the steps of, between said forming the sidewalls and said filling the fourth insulating film:
removing said second insulating film; and forming a silicide film on said word lines.
19 . The method of fabricating a non-volatile semiconductor memory device according to claim 17 , further comprising the steps of, between said forming the sidewalls and said filling the fourth insulating film:
removing said second insulating film; and forming a silicide film on said word lines.
20 . The method of fabricating a non-volatile semiconductor memory device according to claim 14 , wherein said forming the sidewalls comprises the steps of:
forming a third insulating film over the entire surface; and anisotropically etching said third insulating film while concomitantly removing said first insulating film.
21 . The method of fabricating a non-volatile semiconductor memory device according to claim 17 , wherein said forming the sidewalls comprises the steps of:
forming a third insulating film over the entire surface; and anisotropically etching said third insulating film while concomitantly removing said first insulating film.
22 . The method of fabricating a non-volatile semiconductor memory device according to claim 20 , further comprising the steps of, between said anisotropically etching the third insulating film while concomitantly removing the first insulating film and said filling the grooves with the fourth insulating film:
removing said second insulating film; and forming a silicide film on said word lines, said bit lines and a portion of said channel stop impurity-diffused layer exposed out from said sidewalls.
23 . The method of fabricating a non-volatile semiconductor memory device according to claim 21 , further comprising the steps of, between said anisotropically etching the third insulating film while concomitantly removing the first insulating film and said filling the grooves with the fourth insulating film:
removing said second insulating film; and forming a silicide film on said word lines, said bit lines and a portion of said channel stop impurity-diffused layer exposed out from said sidewalls.
24 . A method of fabricating a non-volatile semiconductor memory device comprising the steps of:
forming a tunnel insulating film on a semiconductor substrate; forming a plurality of bit lines comprised of an impurity-diffused layer in the surficial portion of said semiconductor substrate; forming a first insulating film on said plurality of bit lines; forming a floating gate on said tunnel insulating film and said first insulating film; forming a stack comprised of a first oxide film, a nitride film and a second oxide film stacked in this order on said floating gate; successively forming a conductive layer and a second insulating film over the entire surface; patterning said conductive layer and said second insulating film so as to obtain a plurality of word lines crossing in a plan view with said plurality of bit lines; forming a resist film which covers said conductive layer and said second insulating film, and has openings in a plan view in the areas between every adjacent word lines and apart from said word lines; forming a groove by etching the surface of said semiconductor substrate, where masking is effected by said first insulating film and said resist film; forming a channel stop impurity-diffused layer at the bottom of said groove by ion implantation; and filling said groove with a fourth insulating film.
25 . The method of fabricating a non-volatile semiconductor memory device according to claim 15 , further comprising the steps of, between said forming the channel stop impurity-diffused layer and said filling the groove with the fourth insulating film:
removing said second insulating film; and forming a silicide film on said word lines.
26 . The method of fabricating a non-volatile semiconductor memory device according to claim 24 , further comprising the steps of, between said forming the channel stop impurity-diffused layer and said filling the groove with the fourth insulating film:
removing said second insulating film; and forming a silicide film on said word lines.
27 . The method of fabricating a non-volatile semiconductor memory device according to claim 15 , further comprising the steps of, between said forming the channel stop impurity-diffused layer and said filling the groove with the fourth insulating film:
removing said first insulating film; removing said second insulating film; and forming a silicide film on said word lines, said bit lines, and a portion of said channel stop impurity-diffused layer exposed out from said sidewalls.
28 . The method of fabricating a non-volatile semiconductor memory device according to claim 24 , further comprising the steps of, between said forming the channel stop impurity-diffused layer and said filling the groove with the fourth insulating film:
removing said first insulating film; removing said second insulating film; and forming a silicide film on said word lines, said bit lines, and a portion of said channel stop impurity-diffused layer exposed out from said sidewalls.
29 . A method of fabricating a non-volatile semiconductor memory device which comprises a semiconductor substrate, a plurality of bit lines comprised of an impurity-diffused layer formed in the surficial portion of said semiconductor substrate, and a plurality of word lines comprised of a conductive layer formed above said semiconductor substrate and arranged so as to cross with said plurality of bit lines in a plan view, comprising the steps of:
forming a groove by etching said semiconductor substrate, where masking is effected by an insulating film preliminarily formed on said plurality of bit lines and said plurality of word lines; forming a channel stop impurity-diffused layer at the bottom of said groove by ion implantation; and filling said groove with a fourth insulating film.
30 . A method of fabricating a non-volatile semiconductor memory device which comprises a semiconductor substrate, a plurality of bit lines comprised of an impurity-diffused layer formed in the surficial portion of said semiconductor substrate, and a plurality of word lines comprised of a conductive layer formed above said semiconductor substrate and arranged so as to cross with said plurality of bit lines in a plan view, comprising the steps of:
forming a groove by etching said semiconductor substrate, where masking is effected by an insulating film preliminarily formed on said plurality of bit lines and by a resist film preliminarily formed on said word lines; forming a channel stop impurity-diffused layer at the bottom of said groove by ion implantation; and filling said groove with a fourth insulating film.
31 . The method of fabricating a non-volatile semiconductor memory device according to claim 13 , said channel stop impurity-diffused layer is formed by ion implantation also on the lateral faces of said groove in said forming the channel stop impurity-diffused layer at the bottom of the groove by ion implantation.
32 . The method of fabricating a non-volatile semiconductor memory device according to claim 14 , said channel stop impurity-diffused layer is formed by ion implantation also on the lateral faces of said groove in said forming the channel stop impurity-diffused layer at the bottom of the groove by ion implantation.
33 . The method of fabricating a non-volatile semiconductor memory device according to claim 15 , said channel stop impurity-diffused layer is formed by ion implantation also on the lateral faces of said groove in said forming the channel stop impurity-diffused layer at the bottom of the groove by ion implantation.
34 . The method of fabricating a non-volatile semiconductor memory device according to claim 16 , said channel stop impurity-diffused layer is formed by ion implantation also on the lateral faces of said groove in said forming the channel stop impurity-diffused layer at the bottom of the groove by ion implantation.
35 . The method of fabricating a non-volatile semiconductor memory device according to claim 17 , said channel stop impurity-diffused layer is formed by ion implantation also on the lateral faces of said groove in said forming the channel stop impurity-diffused layer at the bottom of the groove by ion implantation.
36 . The method of fabricating a non-volatile semiconductor memory device according to claim 24 , said channel stop impurity-diffused layer is formed by ion implantation also on the lateral faces of said groove in said forming the channel stop impurity-diffused layer at the bottom of the groove by ion implantation.
37 . The method of fabricating a non-volatile semiconductor memory device according to claim 29 , said channel stop impurity-diffused layer is formed by ion implantation also on the lateral faces of said groove in said forming the channel stop impurity-diffused layer at the bottom of the groove by ion implantation.
38 . The method of fabricating a non-volatile semiconductor memory device according to claim 30 , said channel stop impurity-diffused layer is formed by ion implantation also on the lateral faces of said groove in said forming the channel stop impurity-diffused layer at the bottom of the groove by ion implantation.Join the waitlist — get patent alerts
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