Ferroelectric memory and method of fabricating the same

Abstract

A ferroelectric memory includes a substrate and a sheet-shaped device formed over the substrate through an adhesive layer. The sheet-shaped device includes a memory cell array in which a ferroelectric layer is disposed at least in intersecting regions of a plurality of lower electrodes and a plurality of upper electrodes which are formed in the shape of lines, and a peripheral circuit section for the memory cell array.

1 - 6 . (canceled)  
     
     
         7 . A method of manufacturing a ferroelectric memory comprising: 
 forming a separation layer which changes in a property by absorbing light over a light transmissive first substrate;    forming a memory cell array, in which a ferroelectric layer is disposed at least in intersecting regions of a plurality of lower electrodes and a plurality of upper electrodes over a predetermined portion of the separation layer, the lower and upper electrodes being formed in the shape of lines;    forming a peripheral circuit section for the memory cell array over the separation layer in a portion other than the predetermined portion;    bonding a sheet-shaped device including the memory cell array and the peripheral circuit section to a second substrate through at least an adhesive layer; and    removing the sheet-shaped device from the first substrate by applying light to the separation layer through one surface of the first substrate.    
     
     
         8 . The method of manufacturing a ferroelectric memory as defined in  claim 7 , further comprising: 
 stacking a plurality of laminates including the second substrate and the sheet-shaped device removed from the first substrate.    
     
     
         9 . The method of manufacturing a ferroelectric memory as defined in  claim 7 , further comprising: 
 bonding the sheet-shaped device removed from the first substrate to another sheet-shaped device formed over another first substrate with a separation layer interposed in-between through an adhesive layer, and removing the other first substrate by applying light through one surface of the other first substrate,    wherein a plurality of the sheet-shaped devices are stacked over the second substrate by performing this step at least once.    
     
     
         10 . A method of manufacturing a ferroelectric memory comprising: 
 forming a separation layer which changes in a property by absorbing light over each of a light transmissive first substrate and a light transmissive second substrate;    forming a memory cell array, in which a ferroelectric layer is disposed at least in intersecting regions of a plurality of lower electrodes and a plurality of upper electrodes over the separation layer formed over the first substrate, the lower and upper electrodes being formed in the shape of lines;    forming a peripheral circuit section for the memory cell array over the separation layer formed over the second substrate;    bonding the memory cell array and the peripheral circuit section to a third substrate through at least adhesive layers; and    removing the memory cell array and the peripheral circuit section respectively from the first substrate and the second substrate by applying light to the separation layers through one surface of the first substrate and through one surface of the second substrate.    
     
     
         11 . The method of manufacturing a ferroelectric memory as defined in  claim 10 , further comprising: 
 stacking a plurality of laminates including the third substrate, the memory cell array removed from the first substrate, and the peripheral circuit section removed from the second substrate.    
     
     
         12 . The method of manufacturing a ferroelectric memory as defined in  claim 7 , 
 wherein the ferroelectric layer of the memory cell array is formed by cystallizing a mixture of a ferroelectric material and a paraelectric material.    
     
     
         13 . The method of manufacturing a ferroelectric memory as defined in  claim 12 , further comprising: 
 annealing the ferroelectric layer after crystallization by applying laser light to the ferroelectric layer.    
     
     
         14 . A method of manufacturing a ferroelectric memory comprising: 
 forming a first laminate including a memory cell array, in which a ferroelectric layer is disposed at least in intersecting regions of a plurality of lower electrodes and a plurality of upper electrodes over a first substrate having a coefficient of thermal expansion smaller than a coefficient of thermal expansion of a ferroelectric material, the lower and upper electrodes being formed in the shape of lines;    subjecting the first laminate to a first heat treatment and subsequent cooling to cause strain in the first laminate, and removing the memory cell array from the first substrate by subjecting the first laminate to a second heat treatment;    forming a separation layer which changes in a property by absorbing light over a light transmissive second substrate, and forming a second laminate which includes a peripheral circuit for the memory cell array over the separation layer;    bonding the second laminate on the side of the peripheral circuit to a third substrate;    removing the peripheral circuit from the second substrate by changing the properties of the separation layer by applying light to the separation layer from the side of the second substrate of the second laminate; and    bonding the memory cell array removed from the first substrate to the third substrate.    
     
     
         15 . The method of manufacturing a ferroelectric memory as defined in  claim 14 , 
 wherein the first heat treatment is performed at a temperature lower than a temperature at which strain is generated at least in the first substrate, and    wherein the second heat treatment is performed at a temperature equal to or lower than the temperature of the first heat treatment.    
     
     
         16 . The method of manufacturing a ferroelectric memory as defined in  claim 14 , 
 wherein a paraelectric phase including Si or Ge is mixed in the ferroelectric layer.    
     
     
         17 . The method of manufacturing a ferroelectric memory as defined in  claim 14 , 
 wherein the first substrate includes a silicon substrate.