US2005260824A1PendingUtilityA1

Semiconductor device manufacturing method and manufacturing line thereof

Assignee: TOKYO ELECTRON LTDPriority: Apr 16, 1999Filed: Jul 27, 2005Published: Nov 24, 2005
Est. expiryApr 16, 2019(expired)· nominal 20-yr term from priority
H10P 72/0456H10P 72/0452H10D 62/8303H10P 72/0474C23C 16/54C23C 14/56
50
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The present invention provides a semiconductor device manufacturing line for applying a series of processes on a semiconductor substrate, and forming an integrated circuit on the semiconductor substrate by employing a semiconductor wafer having a diameter of 6 inches (150±3 mm: SEAJ specification) or less for the semiconductor substrate. This manufacturing line comprises two sub-lines conforming to the same specifications, each of these sub-lines is composed of a series of processing units including a film forming unit, a pattern exposure unit, an etching unit, and a test unit. In at least one pattern exposure unit and one etching unit, fine processing of 0.3 μm or less can be performed.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device manufacturing method comprising a processing step in which the minimum processing dimension of constituent elements formed on a semiconductor substrate is 0.3 μm or less, wherein a semiconductor wafer having a diameter of 6 inches (150 mm) or less is employed for the semiconductor substrate.  
   
   
       2 . A semiconductor device manufacturing method comprising a processing step in which the minimum processing dimension of constituent elements formed on a semiconductor wafer is 0.3 μm or less, wherein a plurality of processing units and carrying mechanisms targeted for processing the semiconductor wafer having a diameter of 6 inches (150 mm) or less are disposed to be linked with each other, various film forming/processing operations are continuously applied to the semiconductor wafer, and a manufacturing line for forming desired constituent elements on the semiconductor wafer is employed.  
   
   
       3 . A semiconductor device manufacturing method comprising a plurality of film forming steps and a plurality of etching steps, wherein fine processing of 0.3 μm or less in the minimum processing dimension in at least one step of said etching steps is performed, wherein a substrate of 6 inches (150 mm) or less in diameter is employed as a substrate on which a semiconductor device is formed.  
   
   
       4 . A semiconductor device manufacturing method for forming an integrated circuit element on a semiconductor substrate in accordance with a plurality of film forming steps and a plurality of etching steps, wherein fine processing of 0.3 μm or less in the minimum processing dimension is performed in at least one step of said etching steps, and the semiconductor substrate is 6 inches (150 mm) or less in diameter.  
   
   
       5 . A semiconductor device manufacturing method for forming an integrated circuit that includes a transistor having a gate length of 0.3 μm or less, wherein a semiconductor substrate of 6 inches (150 mm) or less in diameter is employed.  
   
   
       6 . A semiconductor device manufacturing method for forming an integrated circuit that includes a transistor having a gate length of 0.3 μm or less, wherein a semiconductor substrate of 6 inches (150 mm) in diameter is employed, and the manufacture quantity of a semiconductor device for mounting the integrated circuits per said one semiconductor substrate is 4 or less.  
   
   
       7 . A semiconductor device manufacturing method for forming an integrated circuit that includes a transistor having a gate length of 0.3 μm or less, wherein a semiconductor substrate of about 2 inches (50 mm) or less in diameter is employed, and the manufacture quantity of a semiconductor device for said one semiconductor substrate is one.  
   
   
       8 . A semiconductor device manufacturing method for forming an integrated circuit on a semiconductor substrate in accordance with a plurality of film forming steps and a plurality of etching steps, wherein fine processing of 0.3 μm or less is performed in at least one of said etching steps, and said semiconductor substrate is employed as a substrate and has a diameter such that the number of integrated circuits that can be formed per one substrate is less than 300.  
   
   
       9 . A semiconductor device manufacturing line for applying a series of processes to a semiconductor substrate, and forming an integrated circuit on the semiconductor substrate, wherein said manufacturing line is composed of a series of processing units including at least a film forming unit and an etching unit, fine processing of 0.3 μm or less can be performed in at least one etching unit, and a series of processing units is substantially targeted for processing only a semiconductor substrate of 6 inches (150 mm) or less in diameter.  
   
   
       10 . A semiconductor device manufacturing line for applying a series of processes to a semiconductor substrate, and forming an integrated circuit on the semiconductor substrate, wherein said manufacturing line is composed of a series of processing units including at least a film forming unit and an etching unit, fine processing of 0.3 μm or less can be performed in at least one etching unit, and said series of processing units conforms to specification that corresponds to a semiconductor substrate of 6 inches (150 mm) or less in diameter.  
   
   
       11 . A semiconductor device manufacturing line for applying a series of processes to a semiconductor substrate, and forming an integrated circuit on the semiconductor substrate, wherein said manufacturing line is composed of a series of processing units including a film forming unit, a pattern exposure unit, an etching unit, and a test unit, fine processing of 0.3 μm or less can be performed in at least one pattern exposure unit and one etching unit, and said series of processing units conforms to specification that corresponds to a semiconductor substrate of 6 inches (150 mm) or less in diameter.  
   
   
       12 - 27 . (canceled)

Join the waitlist — get patent alerts

Track US2005260824A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.