Semiconductor device and method for manufacturing the same

Abstract

A first DRAM section including a first memory cell having a first capacitance and a second DRAM section including a second memory cell having a second capacitance different from the first capacitance are provided on the same semiconductor substrate.

1 - 5 . (canceled)  
   
   
       6 . A semiconductor device, comprising a first DRAM section including a first memory cell having a first capacitive element and a second DRAM section including a second memory cell having a second capacitive element, the first DRAM section and the second DRAM section being provided on the same substrate, wherein: 
 the semiconductor substrate and the first capacitive element are connected to each other by a first plug, and the semiconductor substrate and the second capacitive element arc connected to each other by a second plug; and    different materials are used for the first plug and for the second plug.    
   
   
       7 . The semiconductor device of  claim 6 , wherein a contact resistance between the first plug and the semiconductor substrate is different from that between the second plug and the semiconductor substrate.  
   
   
       8 - 12 . (canceled)  
   
   
       13 . The semiconductor device of  claim 6 , wherein the first plug is made of tungsten, and 
 the second plug is made of silicon.    
   
   
       14 . The semiconductor device of  claim 6 , wherein the first capacitive 
 element has a first capacitor lower electrode, a first capacitor insulating film, and a first capacitor upper electrode,    the second capacitive element has a second capacitor lower electrode, a second capacitor insulating film, and a second capacitor upper electrode,    the first plug is connected to the first capacitor lower electrode, and the second plug is connected to the second capacitor lower electrode.    
   
   
       15 . The semiconductor device of  claim 6 , wherein the first memory cell has, on the semiconductor substrate, a first gate insulating film, a first gate electrode formed on the first gate insulating film, a first diffusion layer formed in the semiconductor substrate beside the first gate electrode, and a silicide layer formed on the first diffusion layer, 
 the second memory cell has, on the semiconductor substrate, a second gate insulating film, a second gate electrode formed on the second gate insulating film, and a second diffusion layer formed in the semiconductor substrate beside the second gate electrode,    the first plug is connected to the silicide layer, and    the second plug is connected to the second diffusion layer.