US2005255823A1PendingUtilityA1

Integrated circuit for processing data blocks received from a plurality of data sources

Assignee: INTERDIGITAL TECH CORPPriority: Nov 5, 2003Filed: Jul 18, 2005Published: Nov 17, 2005
Est. expiryNov 5, 2023(expired)· nominal 20-yr term from priority
H04W 36/18H04W 36/185H04W 36/0069H04L 1/1812H04W 36/02H04L 1/1829H04W 28/10H04L 1/08H04B 7/26H04L 47/34H04L 47/32H04L 1/0643
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Claims

Abstract

An integrated circuit (IC) for processing data blocks received from a plurality of data sources. The IC includes at least one re-ordering function entity, higher protocol layers and an interface for receiving at least one copy of a successfully decoded data block from the data sources. The IC uses the re-ordering function entity to process the copy of the successfully decoded data block to support in-sequence delivery to the higher protocol layers. The IC discards extra copies of a successfully decoded data block received from the data sources. Each data source may be an enhanced uplink soft handover (EU-SHO) Node-B. Each data source may include a medium access control (MAC) entity that handles enhanced uplink dedicated channel (EU-DCH) functionalities. The IC may be located in a serving radio network controller (S-RNC) that processes data blocks forwarded to the S-RNC by the data sources during soft handover.

Claims

exact text as granted — not AI-modified
1 . An integrated circuit (IC) for processing data blocks received from a plurality of data sources, the IC comprising: 
 (a) at least one re-ordering function entity;    (b) higher protocol layers; and    (c) means for receiving at least one copy of a successfully decoded data block from the data sources, wherein the IC uses the re-ordering function entity to process the copy of the successfully decoded data block to support in-sequence delivery to the higher protocol layers.    
   
   
       2 . The IC of  claim 1  further comprising: 
 (d) means for discarding extra copies of a successfully decoded data block received from the data sources.    
   
   
       3 . The IC of  claim 1  wherein each data source is an enhanced uplink soft handover (EU-SHO) Node-B.  
   
   
       4 . The IC of  claim 1  wherein each data source includes a medium access control (MAC) entity that handles enhanced uplink dedicated channel (EU-DCH) functionalities.  
   
   
       5 . The IC of  claim 1  wherein the IC is located in a serving radio network controller (S-RNC) that processes data blocks forwarded to the S-RNC by the data sources during soft handover.  
   
   
       6 . An integrated circuit (IC) for processing data blocks received from a plurality of data sources, the IC comprising: 
 (a) at least one re-ordering function entity; and    (b) means for receiving at least one copy of a successfully decoded data block from the data sources, wherein the IC uses the re-ordering function entity to process the copy of the successfully decoded data block to support in-sequence delivery to external higher protocol layers.    
   
   
       7 . The IC of  claim 6  further comprising: 
 (c) means for discarding extra copies of a successfully decoded data block received from the data sources.    
   
   
       8 . The IC of  claim 6  wherein each data source is an enhanced uplink soft handover (EU-SHO) Node-B.  
   
   
       9 . The IC of  claim 6  wherein each data source includes a medium access control (MAC) entity that handles enhanced uplink dedicated channel (EU-DCH) functionalities.  
   
   
       10 . The IC of  claim 6  wherein the IC is located in a controlling radio network controller (C-RNC) that processes data blocks forwarded to the C-RNC by the data sources during soft handover.

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