Integrated circuit leadframes patterned for measuring the accurate amplitude of changing currents
Abstract
A metallic leadframe for use with a semiconductor chip intended for operation in a changing magnetic field comprises a chip mount pad having at least one slit penetrating the whole thickness of the pad and substantially traversing the area of the pad from one edge to the opposite edge. This slit is wide enough to interrupt electron flow in the pad plane, but not wide enough to significantly reduce thermal conduction in a direction normal to the pad plane, whereby the slit is operable to disrupt eddy currents induced in the pad by the changing magnetic field. A semiconductor device intended for operation in a changing magnetic field, comprising a leadframe with a chip mount pad having at least one slit in a configuration operable to suppress eddy currents induced in the pad by the changing magnetic field; an integrated circuit chip, having an active and a passive surface; the passive surface attached to the mount pad by a polymeric material; and the active surface having a Hall structure including current and voltage terminals integrated into the circuit, whereby the changing magnetic field can be measured without diminution by said eddy currents.
Claims
exact text as granted — not AI-modified1 - 17 . (canceled)
18 . A method of measuring the accurate amplitude of a changing electric current flowing through a conductor, comprising the steps of:
providing an integrated circuit chip having an active and a passive surface, said active surface having an integrated circuit, said conductor and an integrated Hall structure; providing a metallic leadframe having a chip mount pad reducing or eliminating eddy currents in the vicinity of said Hall structure; assembling said chip and said leadframe; initiating said changing electric current through said conductor, thus creating a changing magnetic field normal to the plane of said Hall structure; measuring the changing voltage induced in said Hall structure by said changing magnetic field; calculating the strength of said changing magnetic field, undiminished by said eliminated eddy currents, thereby determining the accurate amplitude of said changing electric current causing said changing magnetic field.
19 . The method according to claim 18 wherein said changing current is an alternating current.
20 . The method according to claim 18 wherein said step of assembling comprises the steps of:
attaching said passive chip surface to said pad chip mount pad; wire bonding said Hall structure to said leadframe; and encapsulating said assembled chip.
21 . A method of measuring the accurate amplitude of a changing electric current, comprising the steps of:
providing an integrated circuit chip having an active and a passive surface, said active surface having an integrated circuit and an integrated Hall structure; providing a metallic leadframe having a chip mount pad reducing or eliminating eddy currents in the vicinity of said Hall structure; assembling said chip and said leadframe, and packaging said assembly; positioning said packaged assembly in the changing magnetic field created by said changing electric current such that said changing magnetic field is normal to the plane of said Hall structure; measuring the changing voltage induced in said Hall structure by said changing magnetic field; calculating the strength of said changing magnetic field, undiminished by said eliminated eddy currents, thereby determining the accurate amplitude of said changing electric current causing said changing magnetic field.Join the waitlist — get patent alerts
Track US2005248005A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.