Ferroelectric memory and method for manufacturing the same

Abstract

A capacitor upper electrode and a wiring are electrically connected to each other by using a plug and a conductive layer formed below a capacitive element without using a plug that directly connects the capacitor upper electrode to the wiring provided thereon via an interlayer insulating film therebetween. Alternatively, the capacitor upper electrode is covered by a conductive hydrogen barrier film, and the capacitor upper electrode and the wiring are electrically connected to each other via both a plug connecting the wiring and the conductive hydrogen barrier film to each other and the conductive hydrogen barrier film.

1 . A ferroelectric memory, comprising: 
 a transistor formed on a semiconductor substrate;    a first interlayer insulating film formed on the semiconductor substrate including the transistor;    a capacitor lower electrode formed on the first interlayer insulating film;    a capacitor insulative film made of a ferroelectric film and formed on the capacitor lower electrode;    a capacitor upper electrode formed on the capacitor insulative film;    a conductive hydrogen barrier film formed on the capacitor upper electrode;    a second interlayer insulating film formed on the first interlayer insulating film including the conductive hydrogen barrier film;    a wiring formed on the second interlayer insulating film;    a first plug formed through the first interlayer insulating film so as to connect the transistor and the capacitor lower electrode to each other; and    a second plug formed through the second interlayer insulating film so as to connect the conductive hydrogen barrier film and the wiring to each other.    
   
   
       2 . The ferroelectric memory of  claim 1 , wherein at least a portion of the capacitor upper electrode is made of a Pt film or a Pt-containing allow film.