Novel development hastened stability of titanium nitride for APM etching rate monitor

Abstract

A method of fabricating a stabilized TiN control wafer comprising the following steps. A silicon substrate is provided having a silicon oxide layer formed thereover. An initial TiN layer is formed over the silicon oxide layer. The silicon substrate is placed in an atmosphere having ambient oxygen for from about 22 to 26 hours to form a rested TiN layer. The rested TiN layer is heated at a temperature of from about 115 to 125° C. for from about 85 to 95 seconds to form a heat treated TiN layer, whereby the heat treated TiN layer is stabilized to form the stabilized TiN control wafer.

1 - 13 . (canceled)  
   
   
       14 . A method of fabricating a stabilized TiN control wafer, the steps comprising 
 providing a silicon substrate oxide layer formed thereover;    forming an initial TiN layer over the silicon oxide layer;    placing the silicon substrate in a clean room having an oxygen ambient atmosphere for from about 22 to 26 hours to form a rested TiN layer; and    subjecting the rested TiN layer to a hot plate treatment at a temperature of from about 115 to 125° C. for from about 85 to 95 seconds to form a hot plate treated TiN layer, whereby the hot plate treated TiN layer is stabilized to form the stabilized TiN control wafer.    
   
   
       15 . The method of  claim 14 , wherein the silicon oxide layer is from about 1000 to 1100 Å thick and the initial TiN layer is from about 950 to 1050 Å.  
   
   
       16 . The method of  claim 14 , wherein the silicon oxide layer is about 1050 Å thick and the initial TiN layer is about 1000 Å.  
   
   
       17 . The method of  claim 14 , wherein the silicon substrate is placed in the clean room for about 24 hours to form the rested TiN layer.  
   
   
       18 . The method of  claim 14 , wherein the hot plate treatment is conducted at a temperature of about 120° C. for about 90 seconds.  
   
   
       19 . The method of  claim 14 , wherein the initial TiN layer is formed by a physical vapor deposition method.  
   
   
       20 . The method of  claim 14 , wherein the rested TiN layer includes an overlying TiN x O x-1  layer.  
   
   
       21 . The method of  claim 14 , wherein the rested TiN layer and the stabilized TiN control wafer include an overlying TiN x O x-1 .  
   
   
       22 . The method of  claim 14 , including the step of then using the control wafer to measure Rs or etch rate.  
   
   
       23 . A method of fabricating a stabilized TiN control wafer, the steps comprising 
 providing a silicon substrate having a silicon oxide layer formed thereover;    forming an initial TiN layer over the silicon oxide layer;    placing the silicon substrate in a clean room having an oxygen ambient atmosphere for from about 22 to 26 hours to form a TiN x O x-1  layer over a rested TiN layer;    subjecting the TiN x O x-1  layer and the rested TiN layer to a hot plate treatment at a temperature of from about 115 to 125° C. for from about 85 to 95 seconds to form a hot plate treated TiN layer, whereby the hot plate treated TiN layer is stabilized to form the stabilized TiN control wafer; and    using the stabilized TiN control wafer to measure Rs or etch rate.    
   
   
       24 . The method of  claim 23 , wherein the silicon oxide layer is from about 1000 to 1100 Å thick and the initial TiN layer is from about 950 to 1050 Å.  
   
   
       25 . The method of  claim 23 , wherein the silicon oxide layer is about 1050 Å thick and the initial TiN layer is about 1000 Å.  
   
   
       26 . The method of  claim 23 , wherein the silicon substrate is placed in the clean room for about 24 hours to form the rested TiN layer.  
   
   
       27 . The method of  claim 23 , wherein the hot plate treatment is conducted at a temperature of about 120° C. for about 90 seconds.  
   
   
       28 . The method of  claim 23 , wherein the initial TiN layer is formed by a physical vapor deposition method.  
   
   
       29 . The method of  claim 23 , wherein the stabilized TiN control wafer has an overlying TiN x O x-1  layer.  
   
   
       30 . The method of  claim 23 , wherein the TiN x O x-1  layer partially stabilizes the rested TiN layer.