Semiconductor device

Abstract

A semiconductor device includes a base P region, a source N + region, and a drain N + region formed in a surface layer portion on a principal surface in an N − silicon layer. In the surface layer portion on the principal surface, an N well region is formed deeper than the drain N + region in a region including the drain N + region and is in contact with the base P region. A trench is formed so as to penetrate the base P region in a direction toward the drain N + region from the source N + region as a planar structure. A gate electrode is formed via a gate insulating film in the inside of the trench.

1 - 15 . (canceled)  
   
   
       16 . A semiconductor device comprising: 
 an emitter region of a first conductivity type;    a base region of a second conductivity type formed in a surface layer portion on a principal surface in a semiconductor substrate of a first conductivity type, the emitter region of the first conductivity type being formed to be shallower than the base region in the surface layer portion on the principal surface in the base region;    a collector region of the second conductivity type formed in a position apart from the base region in the surface layer portion on the principal surface;    a well region of the first conductivity type disposed in the surface layer portion on the principal surface, the well region is formed to be deeper than the collector region and to have a higher concentration than the semiconductor substrate in a region including the collector region and to be in contact with the base region;    a trench formed in the principal surface of the semiconductor substrate to penetrate the base region in a direction toward the collector region from the emitter region as a planar structure thereof;    a gate electrode which is formed via a gate insulating film in the inside of the trench;    an emitter electrode which is electrically connected to the emitter region; and    a collector electrode which is electrically connected to the collector region.    
   
   
       17 . A method of manufacturing the semiconductor device of  claim 16 , the method comprising: 
 arranging an insulating film in which a region where a base contact is to be formed is opened as a contact hole on the principal surface after forming the base region, the emitter region, the collector region, the well region, and the trench; and    performing ion implantation using the insulating film as a mask to form a base contact region apart from the trench in the surface layer portion on the principal surface.    
   
   
       18 . A semiconductor device according to  claim 16 , wherein, at least in the surface layer portion on the principal surface in the base region, a base contact region of the second conductivity type is shallower and has a higher concentration than the base region and is formed between the emitter region and the collector region.  
   
   
       19 . A semiconductor device according to  claim 16 , wherein the concentration of the well region increases continuously from a bottom to a surface.  
   
   
       20 . A semiconductor device according  claim 16 , further comprising another gate electrode arranged in an opening of the emitter region on a side of the trench.  
   
   
       21 . A semiconductor device according to  claim 16 , wherein the collector region and the well region form an island shape, and the base region exists around the collector and the well regions.  
   
   
       22 . A semiconductor device according to  claim 16 , further comprising an emitter cell and a collector cell arranged alternately lengthwise and crosswise adjacent to each other.  
   
   
       23 . A semiconductor device according to  claim 16 , further comprising at least an emitter contact in an outermost circumference in a group of cells provided in parallel adjacent to each other and that is set larger in size than inner emitter contacts.  
   
   
       24 . A semiconductor device according to  claim 16 , further comprising a base contact region of a second conductivity type having a higher concentration than the base region formed in at least the surface layer portion on the principal surface in the base region in a position, where at least the emitter region in an outermost circumference in a group of cells provided in parallel adjacent to each other is to be arranged.  
   
   
       25 . A semiconductor device according to  claim 24 , wherein the collector region is surrounded by the emitter region and the base contact region as a planar structure.