Method and apparatus for generating absolute time in pregroove data

Abstract

An apparatus and a method for generating an ATIP data are provided. The apparatus, based on a wobble signal generated by reading a re-writable compact disc, generates an ATIP data; the apparatus includes: a frequency demodulator for demodulating the wobble signal to generate an original ATIP data signal; an ATIP clock generating circuit for generating an ATIP clock signal based on the wobble signal; and a data generating circuit, coupled to the frequency demodulator and the ATIP clock generating circuit, for generating the ATIP data based on the number of the original ATIP data signal at a first logic level during one period of the ATIP clock signal. This apparatus uses the number of the original ATIP data signal at a first logic level during one period of the ATIP clock signal and the bi-phase rule to precisely generate the ATIP data.

1 . A method of generating an ATIP data, comprising: 
 demodulating a wobble signal to generate an original ATIP data signal (ATIPORG signal) and a plurality of differential data (PRDDIFF data), wherein the wobble signal is generated by reading a re-writable compact disc;    generating an ATIP clock signal (ATIPCLK signal) based on the wobble signal; and    counting the number of the ATIPORG signal at a first logic level during one period of the ATIPCLK signal.    
     
     
         2 . The method of  claim 1 , further comprising: 
 comparing the number of the ATIPORG signal at the first logic level with a predetermined threshold;    asserting the ATIP data to the first logic level when the number of the ATIPORG signal at the first logic level is larger than or equal to the predetermined threshold; and    de-asserting the ATIP data to a second logic level when the number of the ATIPORG signal at the first logic level is smaller than the predetermined threshold.    
     
     
         3 . The method of  claim 1 , further comprising: 
 adding all PRDDIFF data within the period of the ATIPCLK signal to obtain the adding data;    comparing the number of the ATIPORG signal at the first logic level with a first predetermined threshold and a second predetermined threshold, and the first predetermined threshold is larger than the second predetermined threshold;    asserting the ATIP data to the first logic level when the number of the ATIPORG signal at the first logic level is larger than the first predetermined threshold; and    de-asserting the ATIP data to a second logic level when the number of the ATIPORG signal at the first logic level is smaller than the second predetermined threshold;    when the number of the ATIPORG signal at the first logic level is between the first and the second predetermined thresholds:    asserting the ATIP data to the first logic level when the adding data is positive; and    de-asserting the ATIP data to the second logic level when the adding data is negative.    
     
     
         4 . The method of  claim 1 , wherein the step of demodulating the wobble signal to generate the ATIPORG signal further comprises: 
 receiving the wobble signal and generating a plurality of counting data (FMPRD data) in each half-period of the wobble signal;    filtering an average of half-period of the wobble signal from the FMPRD data;    subtracting an average of a half-period of the wobble signal from the FMPRD data to obtain a plurality of differential data (PRDDIFF data) in each half-period of the wobble signal; and    generating the ATIPORG signal based on the PRDDIFF data.    
     
     
         5 . The method of  claim 4 , wherein the step of generating the ATIPORG signal based on the PRDDIFF data comprises: 
 asserting the ATIPORG signal at the first logic level when the PRDDIFF data is positive or zero; and    asserting the ATIPORG signal at the second logic level when the PRDDIFF data is negative.    
     
     
         6 . The method of  claim 1 , wherein the step of generating the ATIPCLK signal based on the wobble signal comprises: 
 counting the wobble signal to generate the ATIPCLK signal, the period of the ATIPCLK signal being 3.5 periods of the wobble signal; and    aligning the ATIPCLK signal to the wobble signal with a status transition when the ATIPORG signal is kept at a same status within a predetermined period of time;    wherein the predetermined period of time is an integral multiple of 3.5 periods of the wobble signal.    
     
     
         7 . The method of  claim 1 , wherein the wobble signal is digitalized and processed by a de-glitch process.  
     
     
         8 . A method for generating an ATIP data, comprising: 
 demodulating a wobble signal to generate an original ATIP data signal (ATIPORG signal) and a plurality of differential data (PRDDIFF data), wherein the wobble signal is generated by reading a re-writable compact disc;    generating an ATIP clock signal (ATIPCLK signal) based on the wobble signal;    defining the next period of the ATIPCLK signal to be a first period when a portion of the generated ATIP data matches a synchronization pattern (sync pattern); and    generating an ATIP data based on the number of the ATIPORG signal at the first logic level corresponding to a 2Nth period of the ATIPCLK signal and the number of the ATIPORG signal at the first logic level corresponding to a 2N+1st period of the ATIPCLK signal, wherein N is a positive integer.    
     
     
         9 . The method of  claim 8 , wherein the step of generating the ATIP data further comprises: 
 counting the number W 1  of the ATIPORG signal at the first logic level, corresponding to the 2N th  period of the ATIPCLK signal;    counting the number W 2  of the ATIPORG signal at the first logic level, corresponding to the 2N+1 st  period of the ATIPCLK signal;    adding the PRDDIFF data in the 2N th  period of the ATIPCLK signal to obtain an adding data S 1 ;    adding the PRDDIFF data in the 2N+1 st  period of the ATIPCLK signal to obtain an adding data S 2 ; and    determining the period of the ATIPCLK signal of the ATIP data is 2N th  period or 2N+1 st  period.    
     
     
         10 . The method of  claim 9 , further comprises: 
 making the ATIP data be inverse of preceding period of the ATIPCLK signal when the period of the ATIPCLK signal is 2N+1 st  period; and    comparing the number W 1  and W 2  when the period of the ATIPCLK signal is 2N th  period.    
     
     
         11 . The method of  claim 10 , further comprises: 
 asserting the ATIP data to the first logic level when W 1 >W 2 ;    de-asserting the ATIP data to a second logic level when W 1 <W 2 ; and    comparing the adding data S 1  and S 2  when W 1 =W 2 .    
     
     
         12 . The method of  claim 10 , further comprises: 
 asserting the ATIP data to the first logic level when S 1 >=S 2 ; and    de-asserting the ATIP data to the second logic level when S 1 <S 2 .    
     
     
         13 . The method of  claim 8 , wherein the step of demodulating the wobble signal to generate the ATIPORG signal comprises: 
 receiving the wobble signal and generating a plurality of counting data (FMPRD data) in each half-period of the wobble signal;    filtering an average of half-period of the wobble signal from the FMPRD data;    subtracting an average of a half-period of the wobble signal from the FMPRD data to obtain a plurality of differential data (PRDDIFF data) in each half-period of the wobble signal; and    generating the ATIPORG signal based on the PRDDIFF data.    
     
     
         14 . The method of  claim 13 , wherein the step of generating the ATIPORG signal based on the PRDDIFF data comprises: 
 asserting the ATIPORG signal at the first logic level when the PRDDIFF data is positive or zero; and;    asserting the ATIPORG signal at the second logic level when the PRDDIFF data is negative.    
     
     
         15 . The method of  claim 8 , wherein the step of generating the ATIPCLK signal based on the wobble signal comprises: 
 counting the wobble signal to generate the ATIPCLK signal, the period of the ATIPCLK signal being 3.5 periods of the wobble signal; and    aligning the ATIPCLK signal to the wobble signal with a status transition when the ATIPORG signal is kept at a same status within a predetermined period of time;    wherein the predetermined period of time is an integral multiple of 3.5 periods of the wobble signal.    
     
     
         16 . The method of  claim 8 , wherein the wobble signal is digitalized and processed by a de-glitch process.  
     
     
         17 . An apparatus for generating an ATIP data, comprising: 
 a frequency demodulator, for demodulating a wobble signal to generate an original ATIP data signal (ATIPORG signal);    an ATIP clock generating circuit, for generating an ATIP clock signal (ATIPCLK signal) based on the wobble signal, wherein the wobble signal is generated by reading a re-writable compact disc; and    an ATIP data generating circuit, coupled to the frequency demodulator and the ATIP clock generating circuit, for generating an ATIP data based on the number of the ATIPORG signal at a first logic level during one period of the ATIPCLK signal.    
     
     
         18 . The apparatus of  claim 17 , wherein the ATIP clock generating circuit comprises: 
 a counter, for counting the wobble signal to generate the ATIPCLK signal to the ATIP data generating circuit and setting the period of the ATIPCLK signal to be 3.5 period of the wobble signal; and    an alignment signal generating circuit, for detecting the ATIPORG signal, wherein when the ATIPORG signal is kept at a same status within a predetermined period of time, the alignment signal generating circuit generates an alignment signal to align the ATIPCLK to the wobble signal with a status transition.    
     
     
         19 . The apparatus of  claim 17 , wherein the frequency demodulator further comprises: 
 a high frequency (HF) counter, for receiving the wobble signal and generating a plurality of counting data (FMPRD data) in each half-period of the wobble signal; and    a low pass filter (LPF), for receiving the FMPRD data and filtering an average of half-period of the wobble signal;    wherein the frequency demodulator subtracts the average of half-period of the wobble signal from the FMPRD data to obtain a plurality of differential data (PRDDIFF data), and the ATIPORG signal is determined by the PRDDIFF data in each half-period of the wobble signal:    the ATIPORG signal is asserted to the first logic level when the PRDDIFF data in half-period of the wobble signal is positive or zero; and    the ATIPORG signal is de-asserting to a second logic level when the PRDDIFF data in half-period of the wobble signal is negative.