Image processing apparatus and method and program of the same

Abstract

An image processing apparatus capable of flexibly changing edge enhancement, blurring, and other image effect processing, wherein, in accordance with the execution of a program by a CPU, the CPU produces control signals to control an image processing circuit, read circuits in the image processing circuit read image data from a memory circuit by using a texture function, a write circuit writes the image data produced by subtraction by a subtraction circuit, multiplication with a coefficient by a multiplication circuit, and addition by an addition circuit to the memory circuit, and the image processing circuit performs processing relating to image effects such as α-blending, edge enhancement, and blurring on the basis of the control signals from the CPU.

1 . An image processing apparatus comprising: 
 a memory circuit for storing image data;    a read circuit for reading at least first image data, second image data, and third image data from said memory circuit;    a first processing circuit for producing fourth image data indicating a difference between said first image data and said second image data read by said read circuit;    a second processing circuit for multiplying said fourth image data with a predetermined coefficient to produce fifth image data;    a third processing circuit for adding said third image data and said fifth image data to produce sixth image data;    a write circuit for writing said sixth image data to said memory circuit; and    a control circuit for executing a predetermined program to control said read circuit, said first processing circuit, said second processing circuit, said third processing circuit, and said write circuit in accordance with the execution of said program;    wherein said read circuit reads plural image data in parallel.    
   
   
       2 . The image processing apparatus as set forth in  claim 1 , wherein said read circuit comprises plural read circuits for respectively reading image data in parallel.  
   
   
       3 . The image processing apparatus as set forth in  claim 1 , wherein said plural image data comprises said first image data and said second image data.  
   
   
       4 . The image processing apparatus as set forth in  claim 1 , wherein 
 said read circuit reads one image data stored in said memory circuit as said first image data and said third image data and reads another image data as said second image data; and    said second processing circuit multiplies said fourth image data with an α-blending coefficient as said predetermined coefficient to produce said fifth image data.    
   
   
       5 . The image processing apparatus as set forth in  claim 3 , wherein 
 said read circuit reads single image data stored in said memory circuit as said first image data and said third image data from a predetermined read position from said memory circuit and reads said second data corresponding to an image obtained by shifting an image corresponding to said single image data by one pixel to a predetermined direction;    said first processing circuit produces a difference between said first image data and said second image data read by said read circuit;    said second processing circuit multiplies said difference with a value corresponding to a degree of edge enhancement; and    said third processing circuit adds a result of the multiplication and said third image data to produce edge enhanced image data.    
   
   
       6 . The image processing apparatus as set forth in  claim 3 , wherein 
 said read circuit reads image data stored in said memory circuit a plurality of times on the basis of said coordinate data while shifting read positions by one pixel; and    said control circuit performs control to combine processing of said first processing circuit, said second processing circuit, and said third processing circuit and average the plurality of image data obtained by the plurality of the read operations to produce image data of an image blurring an image corresponding to image data stored in said memory circuit.    
   
   
       7 . The image processing apparatus as set forth in  claim 6 , wherein 
 said read circuit reads image data stored in said memory circuit from a predetermined position, reads the image data from a position shifted from said predetermined position by one pixel to the right direction, reads the image data from a position shifted from said predetermined position by one pixel to the lower direction, and reads the image data from a position shifted from said predetermined position by one pixel to the right direction and the lower direction; and    said control circuit performs control to average the four series of image data read from the four read positions to produce image data of an image blurring an image corresponding to image data read from said predetermined read position by the operations of said first processing circuit, said second processing circuit, and said third processing circuit.    
   
   
       8 . The image processing apparatus as set forth in  claim 1 , wherein said control circuit performs control to combine operations of said first processing circuit, said second processing circuit, and said third processing circuit and performs processing while giving predetermined weights to said plurality of image data to produce image data of an image blurring an image corresponding to image data stored in said memory circuit.  
   
   
       9 . A method of image processing comprising: 
 a first step of producing fourth image data indicating a difference between first image data and second image data;    a second step of multiplying said fourth image data with a predetermined coefficient to produce fifth image data; and    a third step of adding said third image data and said fifth image data to produce sixth image data and    executing a predetermined program and controlling said first to third steps in accordance with the execution of said program.    
   
   
       10 . A program executed by a processing apparatus and controlling a first processing circuit, a second processing circuit, and a third processing circuit, comprising: 
 a first routine of producing fourth image data indicating a difference between first image data and second image data by said first processing circuit;    a second routine of multiplying said fourth image data with a predetermined coefficient to produce fifth image data by said second processing circuit; and    a third routine of adding said third image data and said fifth image data to produce sixth image data by said third processing circuit.    
   
   
       11 . A method of image processing comprising: 
 a first step of reading first image data and second image data from a memory circuit in parallel;    a second step of producing fourth image data indicating a difference between said first image data and said second image data;    a third step of multiplying said fourth image data with a predetermined coefficient to produce fifth image data;    a fourth step of reading third image data from said memory circuit; and    a fifth step of adding said third image data and said fifth image data to produce sixth image data and    executing a predetermined program and controlling said first to third steps in accordance with the execution of said program.    
   
   
       12 . The method as set forth in  claim 11 , wherein said fourth step is operated in parallel with said third step.  
   
   
       13 . A program executed by a processing apparatus and controlling a memory circuit, a read circuit, a first processing circuit, a second processing circuit, and a third processing circuit, comprising: 
 a first routine of reading first image data and second image data from said memory circuit in parallel by said read circuit;    a second routine of producing fourth image data indicating a difference between said first image data and said second image data by said first processing circuit;    a third routine of multiplying said fourth image data with a predetermined coefficient to produce fifth image data by said second processing circuit;    a fourth routine of reading third image data from said memory circuit by said read circuit; and    a fifth routine of adding said third image data and said fifth image data to produce sixth image data by said third processing circuit.    
   
   
       14 . The method as set forth in  claim 13 , wherein said fourth routine is operated in parallel with said third routine.