Method for maintaining solder thickness in flipchip attach packaging processes

Abstract

A packaging assembly for semiconductor devices and a method for making such packaging is described. The invention provides a non-Pb bump design during a new flip-chip method of packaging. The design uses special conductive materials in a stud form, rather than a solder ball containing Pb. This configuration maintains a desirable solder thickness between the die and the leadframe and forms a high standoff by restricting solder wettabilty on the leadframe side. This configuration also absorbs any stress and protects the die from cracking. The invention also provides methods for making such semiconductor packages.

1 . A semiconductor package, comprising: 
 a die containing a bond pad;    a leadframe containing a plurality of leads;    a plurality of bump structures between the die and the leadframe, the bump structures contain a metal stud with substantially no Pb; and    a molding material encapsulating the plurality of bump structures and the side of the die containing the bond pad.    
   
   
       2 . The package of  claim 1 , wherein the plurality of bump structures couples the die to the leadframe.  
   
   
       3 . The package of  claim 1 , wherein the bump structures also contain a solder paste located on a solderable area of the leadframe.  
   
   
       4 . (canceled)  
   
   
       5 . The package of  claim 4   3 , wherein the solderable area comprises a pad comprising a non-oxidizable metal.  
   
   
       6 . (canceled)  
   
   
       7 . The package of  claim 4   3 , wherein the leadframe also contains a solder dam surrounding the solderable area.  
   
   
       8 . The package of  claim 7 , wherein the solder dam comprises a metal oxide material or a polymeric material.  
   
   
       9 . (canceled)  
   
   
       10 . (canceled)  
   
   
       11 . The package of  claim 1 , wherein the molding material also encapsulates the region of the leadframe connected to the bump structures.  
   
   
       12 . The package of  claim 11 , wherein an exterior surface of the molding material is substantially co-planar with the side of the die opposite the bond pad.  
   
   
       13 . (canceled)  
   
   
       14 . A semiconductor package, comprising: 
 a die containing a bond pad;    a leadframe containing a plurality of leads;    a plurality of bump structures between the die and the leadframe, the bump structures containing a metal stud with less than about 1 ppm Pb; and    a molding material encapsulating the plurality of bump structures and the side of the die containing the bond pad.    
   
   
       15 . The package of  claim 14 , wherein the metal stud of the bump structures is located on a solderable area of the leadframe.  
   
   
       16 . The package of  claim 14 , wherein the solderable area comprises a pad containing a non-oxidizable metal.  
   
   
       17 . The package of  claim 16 , wherein the leadframe also contains a solder dam surrounding the solderable area, the solder dam comprising a metal oxide or polymeric material.  
   
   
       18 . (canceled)  
   
   
       19 . An electronic apparatus, comprising: 
 a semiconductor package containing:    a die containing a bond pad;    a leadframe containing a plurality of leads;    a plurality of bump structures between the die and the leadframe, the bump structures containing a metal stud with substantially no Pb; and    a molding material encapsulating the plurality of bump structures and the side of the die containing the bond pad; and    a circuit board.    
   
   
       20 . A method for making a semiconductor package, the method comprising: 
 providing a die containing a bond pad;    providing a leadframe containing a plurality of leads;    providing a plurality of bump structures between the die and the leadframe, the bump structures containing a metal stud with substantially no Pb; and    providing a molding material encapsulating the plurality of bump structures and the side of the die containing the bond pad.    
   
   
       21 . The method of  claim 20 , including further providing the bump structures so that the metal stud is located on the bond pad.  
   
   
       22 . The method of  claim 20 , including providing the solderable area with a pad containing a non-oxidizable metal.  
   
   
       23 . The method of  claim 22 , including providing the leadframe with a solder dam surrounding the solderable area, the solder darn comprising a metal oxide or polymeric material.  
   
   
       24 - 33 . (canceled)  
   
   
       34 . A method for forming a semiconductor package, the method comprising: 
 providing a die with a metal stud on a bond pad, the stud bump containing substantially no Pb;    providing a leadframe containing a plurality of leads, the leadframe containing a solderable area surrounded by a solder dam;    providing a solder paste on the solderable area;    attaching the die and the leadframe by contacting the metal stud with the solder paste; and    molding a molding material around a portion of the die and a portion of the leadframe.    
   
   
       35 . (canceled)  
   
   
       36 . The method of  claim 34 , wherein the solderable area contains a pad comprising a non-oxidizable metal and the solder dam comprises a metal oxide or polymeric material.  
   
   
       37 . The method of  claim 36 , including providing the metal oxide material by providing a metal and then oxidizing the metal.  
   
   
       38 . The method of  claim 34 , further including re-flowing the solder paste after attaching the die and the leadframe.  
   
   
       39 . A method for making an electronic apparatus, comprising: 
 providing a semiconductor package containing: 
 a die containing a bond pad;  
 a leadframe containing a plurality of leads;  
 a plurality of bump structures between the die and the leadframe, the bump structures containing a metal stud with substantially no Pb; and  
 a molding material encapsulating the plurality of bump structures and the side of the die containing the bond pad;  
   providing a circuit board; and    connecting the semiconductor package to the circuit board.    
   
   
       40 . The apparatus of  claim 19 , wherein the bump structures also contain a solder paste located on a solderable area of the leadframe.  
   
   
       41 . The apparatus of  claim 40 , wherein the solderable area comprises a non-oxidizable metal pad and the leadframe contains a solder dam surrounding the solderable area.  
   
   
       42 . The apparatus of  claim 41 , wherein the solder dam comprises metal oxide material or a polymeric material.  
   
   
       43 . The method of  claim 39 , wherein the bump structures also contain a solder paste located on a solderable area of the leadframe.  
   
   
       44 . The method of  claim 43 , wherein the solderable area comprises a non-oxidizable metal pad and the leadframe contains a solder dam surrounding the solderable area.  
   
   
       45 . The method of  claim 44 , wherein the solder dam comprises metal oxide material or a polymeric material.