US2005221560A1PendingUtilityA1

Method of forming a vertical memory device with a rectangular trench

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Assignee: NANYA TECHNOLOGY CORPPriority: Oct 21, 2002Filed: May 27, 2005Published: Oct 6, 2005
Est. expiryOct 21, 2022(expired)· nominal 20-yr term from priority
Inventors:Yu-Sheng ShuYuan-Hsun WuChung-Yuan LeeShian-Jyh Lin
H10P 50/693H10D 89/10H10B 12/0383H10B 12/0387
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Claims

Abstract

A method of forming a vertical memory device with a rectangular trench. First, a substrate covered by a photoresist layer is provided. Next, the photoresist layer is defined by a mask to form a rectangular opening, wherein the mask has two rectangular transparent patterns arranged with a predetermined interval. Next, the substrate is etched using the defined photoresist layer as a mask to form a single rectangular trench and the photoresist layer is then removed. Finally, a trench capacitor and a vertical transistor are successively formed in the rectangular trench to finish the vertical memory device.

Claims

exact text as granted — not AI-modified
1 - 5 . (canceled)  
   
   
       6 . A method of forming a vertical memory device with a rectangular trench, comprising the steps of: 
 providing a substrate covered by an imaging layer;    defining the imaging layer by a mask to form a rectangular opening, wherein the mask has at least two rectangular transparent patterns arranged with a predetermined interval;    etching the substrate using the defined imaging layer as a mask to form a single rectangular trench;    removing the imaging layer; and    forming a trench capacitor and a vertical transistor in the rectangular trench successively to finish the vertical memory device.    
   
   
       7 . The method as claimed in  claim 6 , wherein the substrate is a semiconductor substrate.  
   
   
       8 . The method as claimed in  claim 6 , wherein the imaging layer is a photoresist substrate.  
   
   
       9 . The method as claimed in  claim 6 , wherein the predetermined interval is about 50˜70 nm.  
   
   
       10 . The method as claimed in  claim 6 , wherein the predetermined interval is about 60 nm.  
   
   
       11 . The method as claimed in  claim 6 , wherein the rectangular trench has a length of about 700˜800 nm.  
   
   
       12 . The method as claimed in  claim 6 , wherein the rectangular trench has a width of about 500-600 nm.  
   
   
       13 . The method as claimed in  claim 6 , wherein the vertical memory device is a dynamic random access memory (DRAM) device.

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