Differential amplifier, digital-to-analog converter and display apparatus

Abstract

A differential amplifier includes a first differential pair, a second differential pair, a load circuit, connected in common to the first and second differential pairs, and first and second current sources for supplying the current to the first and second differential pairs, and amplifies a signal responsive to a common output signal of the first and second differential pairs. One of differential inputs of the first differential pair is connected to a reference voltage. A data output period includes a first period and a second period. During the first period, voltages of first and second input terminals are input through first and fourth switches in the on-state to differential inputs of the second differential pair. The other of the differential inputs of the first differential pair is connected through a third switch in the on-state to an output terminal. An output voltage is stored in a capacitor C connected to the other differential input of the first differential pair. The first, third and fourth switches are turned off during the second period. One of the differential inputs of the second differential pair is connected through a second switch to the output terminal. The other differential input of the second differential pair is connected through a fifth switch to a third input terminal.

1 . A differential amplifier circuit comprising: 
 an input differential stage including a first differential pair, second differential pair, and at least one load circuit connected to output pairs of said first and second differential pairs; and    an amplifier stage, receiving a common output signal of said first and second differential pairs, for charging or discharging an output terminal;    wherein a preset reference voltage is supplied to one of the differential inputs of said first differential pair; and    wherein said differential amplifier circuit further comprises a control circuit for controlling the switching between    a first state in which said output terminal is connected in a feedback fashion to the other of differential inputs of said first differential pair, the voltage at said output terminal is stored in a capacitor connected to the other of the differential inputs of said first differential pair, and first and second voltages are respectively supplied to differential inputs of said second differential pair, and    a second state in which said output terminal is connected in a feedback fashion to one of differential inputs of said second differential pair, a third voltage is applied to the other of the differential inputs of said second differential pair, and the other of the differential inputs of said first differential pair is disconnected from said output terminal.    
   
   
       2 . The differential amplifier circuit according to  claim 1 , wherein said third voltage is equivalent to one of said first voltage and said second voltage.  
   
   
       3 . The differential amplifier circuit according to  claim 1 , wherein said reference voltage is a preset constant voltage in said first state of connection and in said second state of connection.  
   
   
       4 . The differential amplifier circuit according to  claim 1 , wherein said reference voltage, supplied to the one of the differential inputs of said first differential pair, is one of said first, second and the third voltages.  
   
   
       5 . A differential amplifier circuit comprising: 
 an input differential stage including a first differential pair, second differential pair, and a load circuit connected in common to said first and second differential pairs; and    first and second current sources for supplying currents to said first and second differential pairs respectively;    said differential amplifier circuit performing an amplification operation responsive to a common output signal of said first and second differential pairs;    wherein a preset reference voltage is supplied to one of the differential inputs of said first differential pair; and    wherein said differential amplifier circuit further comprises:    first, second and third input terminals;    an output terminal;    a first switch connected between the first input terminal and one of differential inputs of said second differential pair;    a second switch connected between one of the differential inputs of said second differential pair and the output terminal;    a third switch connected between the other of the differential inputs of said first differential pair and the output terminal;    a fourth switch connected between the second input terminal and the other of differential inputs of said second differential pair;    a fifth switch connected between the third input terminal and the other of differential inputs of said second differential pair; and    a capacitor connected to the other of the differential inputs of said first differential pair.    
   
   
       6 . The differential amplifier circuit according to  claim 5 , wherein a data output period includes a first period and a second period; 
 wherein in said first period, said first, third and fourth switches are turned on, while said second and fifth switches are turned off;    voltages of the first and second input terminals are supplied through said first and fourth switches in an on-state, to the differential inputs of said second differential pair, respectively; and    the other of the differential inputs of said first differential pair is connected through said third switch in an on-state to the output terminal of said differential amplifier circuit, the voltage of the output terminal being stored in the capacitor; and    wherein in said second period, said first, third and fourth switches are all turned off, while said second and fifth switches are turned on, so that    one of differential inputs of said second differential pair is connected to the output terminal through said second switch in an on-state; and    the other of the differential inputs of said second differential pair is connected through said fifth switch in an on-state to the third input terminal.    
   
   
       7 . The differential amplifier circuit according to  claim 5 , wherein said third input terminal and said first input terminal constitute a common input terminal.  
   
   
       8 . The differential amplifier circuit according to  claim 7 , comprising; 
 wherein a data output period includes a first period and a second period;    wherein in said first period, said first, third and fourth switches are turned on, while said second and fifth switches are turned off;    voltages of the first and second input terminals are supplied through said first and fourth switches in an on-state, to differential inputs of said second differential pair, respectively; and    the other of the differential inputs of said first differential pair is connected to said third switch in an on-state to the output terminal of said differential amplifier circuit; the voltage of the output terminal being stored in the capacitor; and    wherein in said second period, said first, third and fourth switches are all turned off, while said second and fifth switches are turned on;    one of differential inputs of said second differential pair is connected to the output terminal through said second switch in an on-state; and    the other of the differential inputs of said second differential pair is connected through said fifth switch in an on-state to the first input terminal.    
   
   
       9 . A differential amplifier circuit comprising: 
 an input differential stage including a first differential pair, second differential pair, and first and second load circuit connected to said first and second differential pairs respectively; and    first and second current sources for supplying currents to said first and second differential pairs respectively;    said differential amplifier circuit performing an amplification operation responsive to a common output signal of said first and second differential pairs,    wherein a preset reference voltage is supplied to one of the differential inputs of said first differential pair; and    wherein said differential amplifier circuit further comprises:    first, second and third input terminals;    an output terminal;    a first switch connected between the first input terminal and one of differential inputs of said second differential pair;    a second switch connected between one of the differential inputs of said second differential pair and the output terminal;    a third switch connected between the other of the differential inputs of said first differential pair and the output terminal;    a fourth switch connected between the second input terminal and the other of differential inputs of said second differential pair;    a fifth switch connected between the third input terminal and the other of differential inputs of said second differential pair; and    a capacitor connected to the other of the differential inputs of said first differential pair.    
   
   
       10 . The differential amplifier circuit according to  claim 9 , wherein a data output period includes a first period and a second period; 
 wherein in said first period, said first, third and fourth switches are turned on, while said second and fifth switches are turned off;    voltages of the first and second input terminals are supplied through said first and fourth switches in an on-state, respectively, to differential inputs of said second differential pair; and    the other of the differential inputs of said first differential pair is connected through said third switch in an on-state to the output terminal of said differential amplifier circuit; the voltage of the output terminal being stored in the capacitor, and    wherein in said second period, said first, third and fourth switches are turned off, while said second and fifth switches are turned on;    one of differential inputs of said second differential pair is connected to the output, terminal through said second switch in an on-state; and    the other of the differential inputs of said second differential pair is connected through the fifth switch in an on-state to the third input terminal.    
   
   
       11 . The differential amplifier circuit according to  claim 5 , wherein 
 an amplifier circuit performing an amplification operation responsive to a common output signal of said first and second differential pairs includes a differential amplifier stage having an input pair connected to a common connection node and to the other common connection node of output pairs of said first and second differential pairs and having an output end connected to said output terminal.    
   
   
       12 . A differential amplifier circuit comprising: 
 first and second differential pairs of a first polarity;    a load circuit of a second polarity connected in common to said first and second differential pairs;    first and second current sources for supplying currents to said first and second differential pairs respectively;    third and fourth differential pairs of the second polarity;    a load circuit of the first polarity connected in common to said third and fourth differential pairs;    third and fourth current sources for supplying currents to said third and fourth differential pairs;    a first amplifier circuit for receiving a common output signal of said first and second differential pairs; and    a second amplifier circuit for receiving a common output signal of said third and fourth differential pairs;    wherein differential inputs of said first and third differential pairs are connected together; and    differential inputs of said second and fourth differential pairs are connected together;    wherein a reference voltage is supplied to one of differential inputs of said first and third differential pairs;    wherein said differential amplifier circuit further comprises:    first, second and third input terminals;    an output terminal;    a first switch connected between the first input terminal and one of the differential inputs of said second differential pair;    a second switch connected between one of the differential inputs of said second differential pair and the output terminal;    a third switch connected between the other of the differential inputs of said first differential pair and the output terminal;    a fourth switch connected between the second input terminal and the other of the differential inputs of said second differential pair;    a fifth switch connected between the third input terminal and the other of the differential inputs of said second differential pair; and    a capacitor connected to the other of the differential inputs of said first differential pair.    
   
   
       13 . The differential amplifier circuit according to  claim 12 , wherein a data output period includes a first period and a second period; 
 wherein in said first period, said first, third and fourth switches are all turned on, while said second and fifth switches are turned off;    voltages of the first and second input terminals are supplied through the first and fourth switches each being in an on-states, respectively, to one of the differential inputs of said second and fourth differential pairs; and    the other of the differential inputs of said first and third differential pairs is connected through said third switch in an on-state to the output terminal; the voltage of the output terminal being stored in the capacitor; and    wherein in said second period, said first, third and fourth switches are all turned off, while said second and fifth switches are turned on;    one of the differential inputs of said second and fourth differential pairs is connected to the output terminal through said second switch in an on-state; and    the other of the differential inputs of said second and fourth differential pairs is connected through the fifth switch to the third input terminal    
   
   
       14 . The differential amplifier circuit according to  claim 1 , further comprising 
 a circuit for controlling activation/non-activation of at least one of said first and second differential pairs.    
   
   
       15 . The differential amplifier circuit according to  claim 5 , further comprising 
 a circuit for controlling activation/non-activation of at least one of said first and second current sources.    
   
   
       16 . The differential amplifier circuit according to  claim 1 , further comprising: 
 first and second current sources for supplying currents to said first and second differential pairs respectively; and    a circuit for controlling activation/non-activation of at least one of said first and second current sources.    
   
   
       17 . The differential amplifier circuit according to  claim 6 , further comprising 
 a sixth switch connected between said second differential pair and a second power supply in series with said second current source, wherein said sixth switch is turned on after being turned off for a preset period as from the start of said first period of said data output period.    
   
   
       18 . The differential amplifier circuit according to  claim 6 , further comprising 
 a series circuit including a sixth switch and a third current source connected in series between said first differential pair and said second power supply, said series circuit connected in parallel with said first current source, wherein said sixth switch is turned on after being turned off for a preset period as from the start of said first period of said data output period.    
   
   
       19 . The differential amplifier circuit according to  claim 6 , further comprising 
 sixth and seventh switches for on/off controlling the connection across the output pair of said second differential pair and said load circuit, wherein said sixth and seventh switches are turned on after being turned off for a preset period as from the start of said first period of said data output period.    
   
   
       20 . The differential amplifier circuit according to  claim 6 , further comprising: 
 a sixth switch connected between said first differential pair and a second power supply in series with said first current source; and    a seventh switch connected between said second differential pair and said second power supply in series with said second current source,    wherein said seventh switch is turned on after being turned off for a preset period as from the start of said first period of said data output period; and    wherein said sixth switch is turned off for a preset period as from the start of said second period and is turned on during a period other than said preset period as from the start of said second period of said data output period.    
   
   
       21 . The differential amplifier circuit according to  claim 6 , further comprising: 
 a first series circuit including a sixth switch and a third current source connected in series between said first differential pair and said second power supply, said first series circuit connected in parallel with said first current source; and    a second series circuit including a seventh switch and a fourth current source connected in series between said second differential pair and said second power supply, said second series circuit connected in parallel with said second current source,    wherein said sixth switch is turned off after being turned on for a preset period as from the start of said first period of said data output period; and    wherein said seventh switch is turned on for a preset period as from the start of said second period and is turned off during a period other than said preset period as from the start of said second period of said data output period.    
   
   
       22 . The differential amplifier circuit according to  claim 6 , further comprising: 
 sixth and seventh switches for on/off controlling the connection across the output pair of said first differential pair and said load circuit; and    eighth and ninth switches for on/off controlling the connection across the output pair of said second differential pair and said load circuit,    wherein said eighth and ninth switches are turned on after being turned off for a preset period as from the start of said first period of said data output period; and    wherein said sixth and seventh switches are turned off for a preset period as from the start of said second period and are turned on during a period other than said preset period as from the start of said second period of said data output period.    
   
   
       23 . The differential amplifier circuit according to  claim 5 , wherein said reference voltage, supplied to the one of the differential inputs of said first differential pair, is one of voltages of said first, second and third input terminals.  
   
   
       24 . A digital-to-analog converter circuit comprising said differential amplifier circuit according to  claim 5 , said digital-to-analog converter circuit further comprising: 
 a set of resistors connected in series across a first high-side potential and a second low-side potential; and    a selection circuit supplied with a plurality of potentials from taps of said set of resistors to select the potentials to be supplied to said first, second and third input terminals based on a selection signal.    
   
   
       25 . A display apparatus including an amplifier circuit supplied with grayscale voltage and adapted for driving a data line connected to a display device; wherein 
 the display apparatus comprises a differential amplifier circuit according to  claim 1 .    
   
   
       26 . A display apparatus including an amplifier circuit supplied with grayscale voltage and adapted for driving a data line connected to a display device; wherein 
 the display apparatus comprises a differential amplifier circuit according to  claim 5.