US2005212113A1PendingUtilityA1
Hybrid integrated circuit device and method of manufacturing the same
Est. expiryMar 29, 2024(expired)· nominal 20-yr term from priority
H10W 72/0198H10W 72/884H10W 90/811H10W 90/00H10W 99/00H05K 3/284H05K 1/056H05K 2201/10924H05K 2201/094H05K 2201/09781H05K 3/3405H05K 1/117H05K 2201/1034H05K 3/0052
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Claims
Abstract
A method of manufacturing a hybrid integrated circuit device of the present invention includes the steps of preparing a lead frame which constituted by units each having a plurality of leads, and fixing a circuit substrate on each unit of the lead frame by fixing pads which are formed on the surface of the circuit substrate to the leads, where a space between a first pad which is formed at an end edge of the circuit substrate and a second pad which is adjacent to the first pad is set narrower than a space between the pads themselves.
Claims
exact text as granted — not AI-modified1 . A hybrid integrated circuit device comprising:
a circuit substrate; a plurality of pads arranged along a side surface of the circuit substrate; and leads fixed to the pads, wherein a space between a first pad which is formed at an end edge of the circuit substrate and a second pad which is adjacent to the first pad is set narrower than a space between the other pads themselves.
2 . The hybrid integrated circuit device according to claim 1 , wherein the pads and the leads are fixed to each other with soft solder.
3 . The hybrid integrated circuit device according to claim 1 , wherein any one of the first and second pads is a dummy pad.
4 . A method of manufacturing a hybrid integrated circuit device comprising:
preparing a lead frame which is constituted by units each having a plurality of leads; and fixing a circuit substrate on each unit of the lead frame by fixing pads formed on a surface of the circuit substrate to the leads, wherein a space between a first pad which is formed at an end edge of the circuit substrate and a second pad which is adjacent to the first pad is set narrower than a space between the other pads themselves.
5 . The method according to claim 4 , wherein the pads are arranged along a side edge of the circuit substrate.
6 . The method according to claim 4 , wherein the pads are arranged along opposite side edges of the circuit substrate.
7 . The method according to claim 4 , wherein any one of the first and second pads is a dummy pad.
8 . The method according to claim 4 , wherein the fixing of the leads and the pads to each other is performed with brazing material.
9 . The method according to claim 4 , wherein the circuit substrate is fixed on the lead frame after forming an electric circuit constituted by a conductive pattern and a circuit element on the surface of the circuit substrate.
10 . The method according to claim 4 , wherein an electric circuit formed on the surface of the circuit substrate is sealed after fixing the circuit substrate on the lead frame.Join the waitlist — get patent alerts
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