US2005205921A1PendingUtilityA1

Gain cell type non-volatile memory having charge accumulating region charges or discharged by channel current from a thin film channel path

Assignee: HITACHI LTDPriority: Mar 17, 1999Filed: Feb 14, 2005Published: Sep 22, 2005
Est. expiryMar 17, 2019(expired)· nominal 20-yr term from priority
H10D 30/674H10D 86/201H10D 86/00H10D 30/6728G11C 16/0433H10B 12/00H10B 12/05
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Claims

Abstract

A very thin semiconductor film is used for channels of semiconductor memory elements such that leak currents are reduced by the quantum-mechanical containment effect in the direction of film thickness. The amount of electrical charge accumulated in each charge accumulating region is used to change conductance between a source and a drain region of each read transistor structure. The conductance change is utilized for data storage. The thickness of the channel of the write transistor structure is preferably no more than 5 nm. According to one embodiment, the channel of the write transistor is formed by a semiconductor film deposited on a surface intersecting a principal plane of the substrate.

Claims

exact text as granted — not AI-modified
1 - 47 . (canceled)  
   
   
       48 . A semiconductor element comprising a transistor having a source region, a drain region, a channel region for connecting said source region and said drain region, and a control electrode for controlling conductance of said channel region; 
 wherein an average thickness of said channel region is 5 nm at most.    
   
   
       49 . A semiconductor device according to  claim 48 , comprising a plurality of said transistors in two types, one type of said transistor including an n-type source region and an n-type drain region, the other type of said transistor including a p-type source region and a p-type drain region.  
   
   
       50 . A semiconductor element according to  claim 48 , wherein one end of either said source region or said drain region of said transistor is connected to a data line; 
 wherein another end of either said source region or said drain region of said transistor is connected to a capacitor;    wherein a gate electrode of said transistor is connected to a word line; and    wherein a piece of data is stored by electrical charges stored in said capacitor.

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