Method of manufacturing nonvolatile memory cell

Abstract

The present invention relates to a method of manufacturing a nonvolatile memory cell. The present invention uses tungsten (W) as an upper layer of a control gate electrode in order to integrate the memory cell and performs an ion implantation process for forming a source region and a drain region before a selective oxidization process that is performed to prevent abnormal oxidization of tungsten (W). Therefore, the present invention can reduce a RC delay time of word lines depending on integration of the memory cell and also secure a given distance between a silicon substrate and a tunnel oxide film. As a result, the present invention can solve a data retention problem of the flash memory.

1 - 18 . (canceled)  
   
   
       19 . A method of manufacturing a nonvolatile memory cell, comprising the steps of: 
 forming a tunnel oxide film, a floating gate electrode, a dielectric film and a control gate electrode on a semiconductor substrate;    performing a first selective oxidization process;    forming a source and drain region utilizing a source/drain ion implantation process;    forming an oxide layer on sides of the floating gate electrode and the source and drain region utilizing a second selective oxidization process;    forming an insulation film covering the oxide layer and the control gate electrode; and    performing an etching process to form a first spacer which is formed by the insulating film on at least one side of the dielectric film and the control gate electrode and to form a second spacer which is formed by the oxide layer on at least one side of the floating gate electrode.    
   
   
       20 . The  claim 19 , wherein the control gate electrode is formed by stacking a polysilicon layer and a tungsten nitride film (WN)/tungsten (W).  
   
   
       21 . The method of  claim 19 , wherein the oxide layer is formed in a thickness of about 50 Ř400 Å.  
   
   
       22 . The method of  claim 19 , wherein the dielectric film is formed of a stack structure of a first oxide film, a nitride film and a second oxide film or of a single of the first oxide film.  
   
   
       23 . The method of  claim 19 , wherein the second selective oxidization process uses hydrogen gas.  
   
   
       24 . The method of  claim 19 , wherein the control gate electrode is formed by stacking a polysilicon layer and a tungsten nitride film (WN)/tungsten (W), and the source/drain ion implantation process is performed in a single step using an ion implantation energy of about 5 KeV-30 KeV or about 15 KeV-45 KeV.  
   
   
       25 . The method of  claim 19 , wherein the control gate electrode is formed by stacking a polysilicon layer and a tungsten nitride film (WN)/tungsten (W), and the oxide layer is formed in a thickness of about 50Ř400 Å.  
   
   
       26 . The method of  claim 19 , wherein the control gate electrode is formed by stacking a polysilicon layer and a tungsten nitride film (WN)/tungsten (W), and the dielectric film is formed of a stack structure of a first oxide film, a nitride film and a second oxide film or of a single of the first oxide film.  
   
   
       27 . The method of  claim 19 , wherein the control gate electrode is formed by stacking a polysilicon layer and a tungsten nitride film (WN)/tungsten (W), and the second selective oxidization process uses hydrogen gas.  
   
   
       28 . The method of  claim 19 , wherein the source/drain ion implantation process is performed in a single step using an ion implantation energy of about 5 KeV-30 KeV or about 15 KeV-45 KeV, and the oxide layer is formed in a thickness of about 50 Ř400 Å.  
   
   
       29 . The method of  claim 19 , wherein the source/drain ion implantation process is performed in a single step using an ion implantation energy of about 5 KeV-30 KeV or about 15 KeV-45 KeV, and the dielectric film is formed of a stack structure of a first oxide film, a nitride film and a second oxide film or of a single of the first oxide film.  
   
   
       30 . The method of  claim 19 , wherein the source/drain ion implantation process is performed in a single step using an ion implantation energy of about 5 Kev˜30 KeV or about 15 KeV˜45 KeV, and the second selective oxidization process uses hydrogen gas.  
   
   
       31 . The method of  claim 19 , wherein the oxide layer is formed in a thickness of about 50 Ř400 Å, and the dielectric film is formed of a stack structure of a first oxide film, a nitride film and a second oxide film or of a single of the first oxide film.  
   
   
       32 . The method of  claim 19 , wherein the oxide layer is formed in a thickness of about 50 Ř400 Å, and the second selective oxidization process uses hydrogen gas.  
   
   
       33 . The method of  claim 19 , wherein the dielectric film is formed of a stack structure of a first oxide film, a nitride film and a second oxide film or of a single of the first oxide film, and the second selective oxidization process uses hydrogen gas.  
   
   
       34 . The method of  claim 19 , wherein the first selective oxidization process uses hydrogen gas.