US2005202606A1PendingUtilityA1

Semiconductor device and method of forming the same

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Oct 11, 2002Filed: Feb 10, 2005Published: Sep 15, 2005
Est. expiryOct 11, 2022(expired)· nominal 20-yr term from priority
H10D 84/817H10D 84/811H10D 1/47H10B 69/00
44
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Claims

Abstract

A semiconductor device including a resistor and a method of forming the same. In the semiconductor device, a conductive pattern, which connects source regions, and a resistor are formed of the same material, which can be polysilicon. In the method, the conductive pattern and the resistor are simultaneously formed. Thus, it is possible to obtain a constant sheet resistance without an additional photo mask.

Claims

exact text as granted — not AI-modified
1 . A method of forming a semiconductor device, the method comprising: 
 forming a field isolation layer to define an active region at a semiconductor substrate;    sequentially forming a gate insulation layer and a gate conductive layer on the surface of the semiconductor substrate where the field isolation layer is formed;    sequentially patterning the gate conductive layer and the gate insulation layer to form a gate pattern including a gate insulation pattern and a gate conductive pattern on the active region;    implanting impurities into the active region between the gate patterns, using the gate patterns as ion-implantation masks to form a source region; and    forming a conductive pattern connecting the source regions and simultaneously forming a resistor on the field isolation layer.    
   
   
       2 . The method as claimed in  claim 1 , wherein the conductive layer is formed of polysilicon.  
   
   
       3 . The method as claimed in  claim 1 , wherein the gate insulation layer comprises a tunnel insulation layer, a charge trapping layer, and a blocking insulation layer that are sequentially stacked.  
   
   
       4 . The method as claimed in  claim 3 , wherein the tunnel insulation layer and the blocking insulation layer are formed of oxide.  
   
   
       5 . The method as claimed in  claim 3 , wherein the charge trapping layer is formed of nitride.  
   
   
       6 . The method as claimed in  claim 1 , wherein the gate conductive layer comprises a polysilicon and a metal silicide that are sequentially stacked.  
   
   
       7 . The method as claimed in  claim 1 , further comprising forming a dummy gate pattern on the field isolation layer when forming the gate pattern on the active region.  
   
   
       8 . The method as claimed in  claim 1 , after forming the source region, further comprising forming spacers covering sidewalls of the gate pattern.  
   
   
       9 . The method as claimed in  claim 8 , wherein the spacers are formed of oxide or nitride.  
   
   
       10 . A method of forming a semiconductor device, the method comprising: 
 defining an active region at a semiconductor substrate;    implanting impurities into selective areas of the active region to form source regions; and    forming a conductive pattern connecting the source regions and simultaneously forming a resistor, said conductive pattern and said resistor being formed of the same material.    
   
   
       11 . The method of forming a semiconductor device of  claim 10 , wherein a field isolation layer is used to define said active region.  
   
   
       12 . The method of forming a semiconductor device as recited in  claim 10 , further comprising sequentially forming a gate insulating layer and a gate conductive layer on said semiconductor substrate.  
   
   
       13 . The method recited in  claim 10 , wherein said conductive pattern and said resistor are formed of polysilicon.

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