Data transfer control device and electronic instrument

Abstract

A data transfer control device including: a link controller which analyzes a received packet transferred from a host-side data transfer control device through a serial bus; an interface circuit which generates an interface signal and outputs the generated interface signal to an interface bus; and an internal register in which is set timing information for specifying a timing at which a signal level of the interface signal output from the interface circuit changes. The interface circuit generates the interface signal, a signal level of which changes at a timing according to the timing information set in the internal register.

1 . A data transfer control device which controls data transfer, the data transfer control device comprising: 
 a link controller which analyzes a received packet transferred from a host-side data transfer control device through a serial bus;    an interface circuit which generates an interface signal and outputs the generated interface signal to an interface bus; and    an internal register in which is set timing information for specifying a timing at which a signal level of the interface signal output from the interface circuit changes,    wherein the interface circuit generates the interface signal, a signal level of which changes at a timing according to the timing information set in the internal register.    
   
   
       2 . The data transfer control device as defined in  claim 1 , 
 wherein the timing information is set in the internal register based on a packet transferred from the host-side data transfer control device through the serial bus.    
   
   
       3 . The data transfer control device as defined in  claim 2 , wherein: 
 a packet having data in a data field is transferred from the host-side data transfer control device through the serial bus after the timing information has been set in the internal register; and    the interface circuit outputs an interface signal including a signal of the data set in the packet at a timing according to the timing information set in the internal register.    
   
   
       4 . The data transfer control device as defined in  claim 1 , wherein: 
 the interface circuit outputs an interface signal including a vertical synchronization signal, a horizontal synchronization signal, and a data signal; and    at least one of a length of a horizontal synchronization period, a length of a display period in the horizontal synchronization period, a start position of the display period in the horizontal synchronization period, a pulse width of the horizontal synchronization signal, a length of a vertical synchronization period, a length of a display period in the vertical synchronization period, a start position of the display period in the vertical synchronization period, and a pulse width of the vertical synchronization signal is set in the internal register as the timing information.    
   
   
       5 . The data transfer control device as defined in  claim 1 , 
 wherein the interface circuit generates an interface signal for an RGB interface based on the timing information set in the internal register.    
   
   
       6 . The data transfer control device as defined in  claim 1 , wherein: 
 a packet transferred from the host-side data transfer control device through the serial bus includes a synchronization signal code field for setting a synchronization signal code; and    the interface circuit generates a synchronization signal which is the interface signal based on the synchronization signal code set in the packet and the timing information set in the internal register.    
   
   
       7 . The data transfer control device as defined in  claim 6 , 
 wherein the link controller receives a display period packet in which data is set in a data field from the host-side data transfer control device in a display period, and receives a non-display period packet in which no data is set in the data field from the host-side data transfer control device in a non-display period.    
   
   
       8 . The data transfer control device as defined in  claim 6 , wherein: 
 when the link controller has received a display period packet in which data is set in a data field from the host-side data transfer control device, the link controller outputs a header including the synchronization signal code set in the packet and the data set in the packet to the interface circuit; and    when the link controller has received a non-display period packet in which no data is set in the data field from the host-side data transfer control device, the link controller outputs a header including the synchronization signal code set in the packet to the interface circuit.    
   
   
       9 . A data transfer control device which controls data transfer, the data transfer control device comprising: 
 an interface circuit which performs interface processing between the data transfer control device and a system device;    a link controller which generates a packet to be transmitted to a target-side data transfer control device through a serial bus; and    an internal register accessed by the system device through the interface circuit,    wherein the system device set timing information in the internal register, the timing information being used for specifying a timing at which a signal level of an interface signal output from an interface circuit of the target-side data transfer control device changes; and    wherein the link controller generates a packet including the timing information set in the internal register, and transmits the generated packet to the target-side data transfer control device through the serial bus.    
   
   
       10 . The data transfer control device as defined in  claim 9 , wherein: 
 the internal register includes a register transfer start register; and    the link controller generates the packet including the timing information set in the internal register when the system device has instructed start of transfer by using the register transfer start register, and transmits the generated packet to the target-side data transfer control device through the serial bus.    
   
   
       11 . The data transfer control device as defined in  claim 9 , 
 wherein the link controller generates a packet having data in a data field and transmits the generated packet to the target-side data transfer control device after transmitting the packet including the timing information to the target-side data transfer control device.    
   
   
       12 . An electronic instrument, comprising: 
 the target-side data transfer control device as defined in  claim 1;     a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and    one or more devices connected to the target-side data transfer control device through the interface bus.    
   
   
       13 . An electronic instrument, comprising: 
 the target-side data transfer control device as defined in  claim 2;     a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and    one or more devices connected to the target-side data transfer control device through the interface bus.    
   
   
       14 . An electronic instrument, comprising: 
 the target-side data transfer control device as defined in  claim 3;     a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and    one or more devices connected to the target-side data transfer control device through the interface bus.    
   
   
       15 . An electronic instrument, comprising: 
 the target-side data transfer control device as defined in  claim 4;     a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and    one or more devices connected to the target-side data transfer control device through the interface bus.    
   
   
       16 . An electronic instrument, comprising: 
 the target-side data transfer control device as defined in  claim 5;     a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and    one or more devices connected to the target-side data transfer control device through the interface bus.    
   
   
       17 . An electronic instrument, comprising: 
 the target-side data transfer control device as defined in  claim 6;     a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and    one or more devices connected to the target-side data transfer control device through the interface bus.    
   
   
       18 . An electronic instrument, comprising: 
 the host-side data transfer control device as defined in  claim 9;     a target-side data transfer control device connected to the host-side data transfer control device through the serial bus; and    one or more devices connected to the target-side data transfer control device through the interface bus.    
   
   
       19 . An electronic instrument, comprising: 
 the host-side data transfer control device as defined in  claim 10;     a target-side data transfer control device connected to the host-side data transfer control device through the serial bus; and    one or more devices connected to the target-side data transfer control device through the interface bus.    
   
   
       20 . An electronic instrument, comprising: 
 the host-side data transfer control device as defined in  claim 11;     a target-side data transfer control device connected to the host-side data transfer control device through the serial bus; and    one or more devices connected to the target-side data transfer control device through the interface bus.