Method of manufacture for improved diode for use in MRAM devices

Abstract

The method for manufacturing a data storage device is disclosed. The device has a plurality of word lines, a plurality of bit lines, and a resistive crosspoint array of memory cells. Each memory cell is connected to a bit line and connected to an isolation diode that further connects to a respective word line. The isolation diode provides a unidirectional conductive path from the bit line to the word line. Each word line provides a common metal-semiconductor contact with each diode sharing the word line such that each diode has a separate metal contact located between the semiconductor portion of the common metal-semiconductor contact and its respective memory cell.

1 . A process of making a data storage device, comprising: 
 forming a plurality of word lines, each word line comprising a metal trace;    forming an amorphous semiconductor layer on each of the word lines;    forming a plurality of metal contacts on each of the amorphous semiconductor layers, each of the plurality of contacts isolated from one another and resulting in a common metal-semiconductor contact for each word line;    forming a magneto-resistive memory cell on each of the plurality of metal contacts, thereby forming a unidirectional conductive path from the memory cell to its corresponding word line; and    forming a plurality of bit lines comprising a metal trace such that each bit line is connected to a portion of the memory cells thereby forming a conductive path from the bit line to the word line through each shared memory cell.    
   
   
       2 . The process according to  claim 1  wherein the metal contact forming step further comprises selecting platinum as the metal contact.  
   
   
       3 . The process according to  claim 1  wherein the metal contact forming step further comprises selecting a metal as the metal contact from the group consisting of gold, silver, aluminum, or copper.  
   
   
       4 . The process according to  claim 1  wherein the amorphous semiconductor comprises silicon and wherein a metal-silicide layer is formed by reaction between the silicon and the metal contact.  
   
   
       5 . The process according to  claim 1  wherein the data storage device is an MRAM cell.  
   
   
       6 . The process according to  claim 1  wherein the amorphous semiconductor layer forming step comprises doping the amorphous semiconductor layer with an n-dopant.  
   
   
       7 . The process according to  claim 1  wherein the magneto-resistive memory cell forming step includes the steps of forming a reference layer and forming a data layer, the reference layer formed adjacent the word line and the data layer adjacent the bit line.