US2005201136A1PendingUtilityA1

Electrically programmable memory element with reduced area of contact and method for making same

Priority: Mar 25, 1999Filed: May 5, 2005Published: Sep 15, 2005
Est. expiryMar 25, 2019(expired)· nominal 20-yr term from priority
G11C 11/56G11C 11/5678G11C 13/0004H10N 70/826H10N 70/231H10N 70/8413H10N 70/011H10B 63/82H10N 70/8828
40
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Claims

Abstract

An electrically programmable memory element comprising a programmable resistance memory material. In one embodiment, the memory element has a cup-shaped electrical contact. A portion of the rim of the electrical contact is recessed below another portion of the rim.

Claims

exact text as granted — not AI-modified
1 . An electrically programmable memory element, comprising: 
 a first dielectric layer having an opening;    a conductive layer disposed on a sidewall surface of said opening;    a second dielectric layer disposed in said opening over said conductive layer;    said conductive layer including a first portion on said sidewall surface and a second portion on said sidewall surface, said second portion having an upper surface recessed below the upper surface of said first portion; and    a programmable resistance memory material electrically coupled to said conductive layer.    
     
     
         2 . The memory element of  claim 1 , wherein said programmable resistance material is electrically coupled to the upper surface of said first portion of said conductive layer.  
     
     
         3 . The memory element of  claim 1 , wherein substantially all electrical communication between said programmable resistance material and said conductive layer is through the upper surface of said first portion of said conductive layer.  
     
     
         4 . The memory element of  claim 1 , wherein said opening is a hole or a trench.  
     
     
         5 . The memory element of  claim 1 , wherein said conductive layer is disposed on a bottom of said opening.  
     
     
         6 . The memory element of  claim 1 , wherein said conductive layer is a conductive liner.  
     
     
         7 . The memory element of  claim 1 , wherein said conductive layer is a conductive spacer.  
     
     
         8 . The memory element of  claim 1 , wherein said conductive layer is cup-shaped.  
     
     
         9 . The memory element of  claim 1 , wherein said programmable resistance memory material is a phase-change material.  
     
     
         10 . The memory element of  claim 1 , wherein said programmable resistance memory material includes a chalcogen element.  
     
     
         11 . The memory element of  claim 1 , wherein said conductive layer has a lateral thickness of less 500 Angstroms at the upper surface of said second portion.  
     
     
         12 . An electrically programmable memory element, comprising: 
 a first dielectric layer having an opening;    a conductive layer disposed on a sidewall surface of said opening;    a second dielectric layer disposed in said opening over said conductive layer;    said conductive layer including a first portion on said sidewall surface and a second portion on said sidewall surface, said first portion having an upper surface raised above the upper surface of said second portion; and    a programmable resistance memory material electrically coupled to said conductive layer.    
     
     
         13 . The memory element of  claim 12 , wherein said programmable resistance material is electrically coupled to the upper surface of said first portion of said conductive layer.  
     
     
         14 . The memory element of  claim 12 , wherein substantially all electrical communication between said programmable resistance material and said conductive layer is through the upper surface of said first portion of said conductive layer.  
     
     
         15 . The memory element of  claim 12 , wherein said opening is a hole or a trench.  
     
     
         16 . The memory element of  claim 12 , wherein said conductive layer is disposed on a bottom of said opening.  
     
     
         17 . The memory element of  claim 12 , wherein said conductive layer is a conductive liner.  
     
     
         18 . The memory element of  claim 12 , wherein said conductive layer is a conductive spacer.  
     
     
         19 . The memory element of  claim 12 , wherein said conductive layer is cup-shaped.  
     
     
         20 . The memory element of  claim 12 , wherein said programmable resistance memory material is a phase-change material.  
     
     
         21 . The memory element of  claim 12 , wherein said programmable resistance memory material includes a chalcogen element.  
     
     
         22 . The memory element of  claim 12 , wherein said conductive layer has a lateral thickness of less 500 Angstroms at the upper surface of said second portion.  
     
     
         23 . An electrically programmable memory element, comprising: 
 a substrate;    a cup-shaped electrical contact electrically coupled to said substrate, said cup-shaped electrode having an open-end facing away from said substrate, said cup-shaped contact having a rim, said rim having a first portion and a second portion, said second portion recessed below said first portion;    a dielectric material disposed on the interior surface of said cup-shaped electrode; and    a programmable resistance material electrically coupled to said first portion of said rim.    
     
     
         24 . The memory element of  claim 23 , wherein said contact comprises a conductive material.  
     
     
         25 . The memory element of  claim 23 , wherein said programmable resistance material is a phase-change material.  
     
     
         26 . The memory element of  claim 23 , wherein said programmable resistance material comprises a chalcogen element.

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