US2005196954A1PendingUtilityA1

Method for manufacturing semiconductor integrated circuit device

Assignee: RENESAS TECH CORPPriority: Dec 18, 2001Filed: Apr 28, 2005Published: Sep 8, 2005
Est. expiryDec 18, 2021(expired)· nominal 20-yr term from priority
Inventors:Junji Noguchi
H10P 50/267H10P 70/277H10P 52/403H10P 14/6905H10P 14/6328H10P 14/662H10W 20/097H10W 20/096H10W 20/075H10W 20/071H10W 20/062H10W 20/056H10W 20/077H10D 64/011
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Claims

Abstract

Provided is a manufacturing method of a semiconductor device which comprises (a) depositing a first insulating film over a wafer, (b) forming an interconnect opening in the first insulating film, (c) forming, in the interconnect opening, an interconnect having a conductor film comprised mainly of copper, (d) forming a taper at a corner of said conductor film on the opening side of the interconnect opening, and (e) depositing a second insulating film over the first insulating film and interconnect. The present invention makes it possible to improve dielectric breakdown strength between interconnects each having a main conductor film comprised mainly of copper.

Claims

exact text as granted — not AI-modified
1 - 25 . (canceled)  
   
   
       26 . A method for manufacturing a semiconductor device, comprising, in the metallization of each of a plurality of interconnect layers formed over a wafer: 
 (a) depositing a first insulating film over a wafer;    (b) forming an interconnect opening in said first insulating film;    (c) forming, in said interconnect opening, an interconnect including a first conductor film having barrier properties against copper diffusion and a second conductor film comprised mainly of copper; and    (d) depositing a second insulating film over said first insulating film and said interconnect,    wherein in the metallization step of the interconnect layers relatively near the main surface of said wafer among said plurality of interconnect layers, said method further comprises, between said steps (c) and (d), a step of forming a taper at a corner of said second conductor film on the opening side of said interconnect opening, and    wherein in the metallization step of the interconnect layers relatively far from the main surface of said wafer among said plurality of interconnect layers, said second insulating film is deposited without forming said taper.    
   
   
       27 . A method for manufacturing a semiconductor device, comprising, in the metallization of at least two of a plurality of interconnect layers formed over a wafer: 
 (a) depositing a first insulating film over a wafer;    (b) forming an interconnect opening in said first insulating film;    (c) forming, in said interconnect opening, an interconnect including a first conductor film having barrier properties against copper diffusion and a second conductor film comprised mainly of copper;    (d) forming a taper at a corner of said second conductor film on the opening side of said interconnect opening; and    (e) depositing a second insulating film over said first insulating film and said interconnect,    wherein said taper of said second conductor film in the interconnect of the interconnect layer relatively near the main surface of said wafer, among said plurality of interconnect layers, is formed greater than said taper of said second conductor film in the interconnect of the interconnect layer relatively far from the main surface of said wafer among said plurality of interconnect layers.    
   
   
       28 . A method for manufacturing a semiconductor device, comprising, in the metallization of each of a plurality of interconnect layers formed over a wafer: 
 (a) depositing a first insulating film over a wafer;    (b) forming an interconnect opening in said first insulating film;    (c) forming, in said interconnect opening, an interconnect including a first conductor film having barrier properties against copper diffusion and a second conductor film comprised mainly of copper; and    (d) depositing a second insulating film over said first insulating film and said interconnect,    wherein in the metallization formation step of the interconnect layer relatively near the main surface of said wafer among said plurality of interconnect layers, the method further includes, between said steps (c) and (d), a step of forming a step difference between a first surface of said second conductor film on a side on which said second insulating film is deposited and a second surface of said first insulating film on a side on which said second insulating film is to be deposited, and    wherein in the metallization step of the interconnect layer relatively far from the main surface of said wafer among said plurality of interconnect layers, said second insulating film is deposited without the step of forming said step difference.    
   
   
       29 . A method for manufacturing a semiconductor device, comprising, in the metallization of at least two of a plurality of interconnect layers formed over a wafer: 
 (a) depositing a first insulating film over a wafer;    (b) forming an interconnect opening in said first insulating film;    (c) forming, in said interconnect opening, an interconnect including a first conductor film having barrier properties against copper diffusion and a second conductor film comprised mainly of copper;    (d) forming a step difference between a first surface of said second conductor film on a side on which a second insulating film is to be deposited and a second surface of said first insulating film on a side on which said second insulating film is to be deposited; and    (e) depositing said second insulating film over said first insulating film and interconnect,    wherein said step difference of said second conductor film in the interconnect of the interconnect layer relatively near the main surface of said wafer among said plurality of interconnect layers is formed greater than said difference of second conductor film in the interconnect of the interconnect layer relatively far from the main surface of said wafer.    
   
   
       30 . A method according to  claim 29 , 
 wherein said step (d) is a step for selectively etching a surface layer of the first surface of said second conductor film to indent the first surface of said second conductor film relative to the second surface of said first insulating film in a direction of the main surface of said wafer.    
   
   
       31 . A method for manufacturing a semiconductor device, comprising, in the metallization of each of a plurality of interconnect layers formed over a wafer: 
 (a) depositing a first insulating film over a wafer;    (b) forming an interconnect opening in said first insulating film;    (c) forming, in said interconnect opening, an interconnect including a first conductor film having barrier properties against copper diffusion and a second conductor film comprised mainly of copper; and    (d) depositing a second insulating film over said first insulating film and said interconnect,    wherein in the metallization step of the interconnect layer relatively near the main surface of said wafer among said plurality of interconnect layers, the method further includes, between said steps (c) and (d), a step of forming a step difference between a first surface of said first and second conductor films on a side on which said second insulating film is to be deposited and a second surface of said first insulating film on a side on which said second insulating film is to be deposited, and    wherein in the metallization step of the interconnect layer relatively far from the main surface of said wafer among said plurality of interconnect layers, said second insulating film is deposited without forming said step difference.    
   
   
       32 . A method for manufacturing a semiconductor device, comprising, in the metallization step of at least two of a plurality of interconnect layers formed over a wafer: 
 (a) depositing a first insulating film over a wafer;    (b) forming an interconnect opening in said first insulating film;    (c) forming, in said interconnect opening, an interconnect including a first conductor film having barrier properties against copper diffusion and a second conductor film comprised mainly of copper;    (d) forming a step difference between a first surface of said first and second conductor films on a side on which a second insulating film is to be deposited and a second surface of said first insulating film on a side on which said second insulating film is to be deposited; and    (e) depositing said second insulating film over said first insulating film and said interconnect,    wherein said step difference in the interconnect of the interconnect layer relatively near the main surface of said wafer, among said plurality of interconnect layers, is formed greater than said step difference in the interconnect of the interconnect layer relatively far from the main surface of said wafer among said plurality of interconnect layers.    
   
   
       33 . A method according to  claim 32 , 
 wherein said step (d) is a step of selectively etching a surface layer on the first surface of said first and second conductor films to indent the first surface of said first and second conductor films relative to the polished surface of said first insulating film in a direction of the main surface of said wafer.    
   
   
       34 . A manufacturing method according to  claim 32 , 
 wherein said step (d) is a step of selectively etching the second surface of said first insulating film so that the first surface of said first and second conductor films protrude relative to the second surface of said first insulating film in a direction far from the main surface of said wafer.

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