Packaged die on PCB with heat sink encapsulant and methods

Abstract

An apparatus and a method for providing a heat sink on an upper surface of a semiconductor chip by placing a heat-dissipating material thereon which forms a portion of a glob top. The apparatus comprises a semiconductor chip attached to and in electrical communication with a substrate. A barrier glob top material is applied to the edges of the semiconductor chip on the surface (“opposing surface”) opposite the surface attached to the substrate to form a wall around a periphery of the opposing surface of the semiconductor chip wherein the barrier glob top material also extends to contact and adhere to the substrate. The wall around the periphery of the opposing surface of the semiconductor chip forms a recess. A heat-dissipating glob top material is disposed within the recess to contact the opposing surface of the semiconductor chip.

1 . A semiconductor assembly having a substrate and a semiconductor chip having a first surface connected to the substrate and a second surface, the assembly comprising: 
 a barrier material located round the periphery of the second surface of the semiconductor chip substantially forming a wall having a portion contacting the substrate;    a recess formed by the wall about the periphery of the second surface of the semiconductor chip; and    a heat-dissipating material disposed within the recess having a second thermal conductivity different than the barrier material.    
     
     
         2 . A semiconductor assembly of  claim 1  wherein the barrier material adheres to a periphery of the second surface of the semiconductor chip substantially forming a wall, the barrier material substantially contacting a portion of the substrate, the barrier material having a first thermal conductivity and wherein the heat-dissipating material is disposed within the recess, the heat-dissipating material having a second thermal conductivity different than the first thermal conductivity of the barrier material.  
     
     
         3 . The semiconductor assembly of  claim 2 , wherein the second thermal conductivity of the heat-dissipating material is greater than the first thermal conductivity of the barrier material.  
     
     
         4 . The semiconductor assembly of  claim 1 , wherein the barrier material substantially encapsulates at least one bond wire forming a connection between the semiconductor chip and the substrate.  
     
     
         5 . The semiconductor assembly of  claim 2 , wherein an electrical connection between the semiconductor chip and the substrate comprises at least one tape automated bond between at least one electrical contact point on the second surface of the semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         6 . The semiconductor assembly of  claim 5 , wherein the barrier material substantially encapsulates the at least one tape automated bond.  
     
     
         7 . The semiconductor assembly of  claim 2 , wherein an electrical connection between the semiconductor chip and the substrate comprises at least one conductive bond between at least one electrical contact point on the second surface of the semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         8 . The semiconductor assembly of  claim 7 , further comprising an underfill encapsulant disposed between the semiconductor chip and the substrate.  
     
     
         9 . An assembly method for a semiconductor assembly having a substrate and a semiconductor chip having a first surface and a second surface comprising: 
 attaching at least a portion of the first surface of the semiconductor chip to at least a portion of the substrate;    forming an electrical connection between the semiconductor chip and the substrate;    forming a wall substantially around a periphery of the second surface of the semiconductor chip using a barrier material, the wall around the periphery of the second surface of the semiconductor chip defining a recess, the barrier material having a first thermal conductivity;    extending the barrier material to contact the substrate; and    disposing a heat-dissipating material substantially within the recess, the heat-dissipating material having a second thermal conductivity different than the first thermal conductivity of the barrier material.    
     
     
         10 . The method of  claim 9 , wherein the second thermal conductivity of the heat-dissipating material is greater than the first thermal conductivity of the barrier material.  
     
     
         11 . The method of  claim 9 , wherein the electrical connection between the semiconductor chip and the substrate comprises attaching at least one bond wire between at least one electrical contact point on the second surface of the semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         12 . The method of  claim 9 , wherein the barrier material substantially encapsulates the at least one bond wire.  
     
     
         13 . The method of  claim 9 , wherein the electrical connection between the semiconductor chip and the substrate comprises attaching at least one tape automated bond between at least one electrical contact point on the second surface of the semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         14 . The method of  claim 13 , wherein the barrier material substantially encapsulates the at least one tape automated bond.  
     
     
         15 . The method of  claim 9 , wherein the electrical connection between the semiconductor chip and the substrate comprises attaching at least one conductive bond between at least one electrical contact point on the second surface of the semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         16 . The method of  claim 15 , further comprising disposing an underfill encapsulant substantially between the semiconductor chip and the substrate.  
     
     
         17 . A semiconductor assembly having a semiconductor chip having a first surface and a second surface, the first surface attached to at least a portion of a substrate and electrically connected to a portion of the substrate comprising: 
 a barrier material adhered to a periphery of the second surface of the semiconductor chip substantially forming a wall, a portion of the wall extending beyond the semiconductor chip forming a recess located above the second surface of the semiconductor chip, the barrier material substantially extending to and contacting portions of the substrate, the barrier material having a first thermal conductivity; and    a heat-dissipating material disposed within the recess, the heat-dissipating material having a second thermal conductivity different than the first thermal conductivity of the barrier material.    
     
     
         18 . The semiconductor assembly of  claim 17 , wherein the second thermal conductivity of the heat-dissipating material is greater than the first thermal conductivity of the barrier material.  
     
     
         19 . The semiconductor assembly of  claim 17 , wherein the electrical connection between the semiconductor chip and the substrate comprises at least one bond wire between at least one electrical contact point on the second surface of the semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         20 . The semiconductor assembly of  claim 17 , wherein the barrier material substantially encapsulates the at least one bond wire.  
     
     
         21 . The semiconductor assembly of  claim 17 , wherein the electrical connection between the semiconductor chip and the substrate comprises at least one tape automated bond between at least one electrical contact point on the second surface of the semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         22 . The semiconductor assembly of  claim 21 , wherein the barrier material substantially encapsulates the at least one tape automated bond.  
     
     
         23 . The semiconductor assembly of  claim 17 , wherein the electrical connection between the semiconductor chip and the substrate comprises at least one conductive bond between at least one electrical contact point on the second surface of the semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         24 . The semiconductor assembly of  claim 23 , further comprising an underfill encapsulant substantially disposed between the semiconductor chip and the substrate.  
     
     
         25 . A method of making a semiconductor assembly having a substrate and a plurality of semiconductor chips, each semiconductor chip of the plurality having a first surface and a second surface, comprising: 
 attaching a portion of the first surface of each semiconductor chip to a portion of the substrate;    disposing an underfill material substantially between the substrate and each semiconductor chip;    forming an electrical connection between each semiconductor chip and the substrate;    forming a wall substantially around a periphery of the second surface of each semiconductor chip using a barrier material, the wall and the second surface of each semiconductor chip defining a recess, the barrier material having a first thermal conductivity;    extending the barrier material to contact and adhere to the substrate; and    disposing a heat-dissipating material substantially within the recess, the heat-dissipating material having a second thermal conductivity different than the first thermal conductivity of the barrier material.    
     
     
         26 . The method of  claim 25 , wherein the second thermal conductivity of the heat-dissipating material is greater than the first thermal conductivity of the barrier material.  
     
     
         27 . The method of  claim 25 , wherein the electrical connection between each semiconductor chip and the substrate comprises attaching at least one bond wire between at least one electrical contact point on the second surface of each semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         28 . The method of  claim 27 , wherein the barrier material substantially encapsulates the at least one bond wire.  
     
     
         29 . The method of  claim 27 , wherein the electrical connection between each semiconductor chip and the substrate comprises attaching at least one tape automated bond between at least one electrical contact point on the second surface of each semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         30 . The method of  claim 29 , wherein the barrier material substantially encapsulates the at least one tape automated bond.  
     
     
         31 . The method of  claim 25 , wherein the electrical connection between each semiconductor chip and the substrate comprises attaching at least one conductive bond between at least one electrical contact point on the second surface of each semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         32 . A heat transfer method for a semiconductor assembly having a substrate and a plurality of semiconductor chips, each semiconductor chip of the plurality having a first surface and a second surface, comprising: 
 attaching a portion of the first surface of each semiconductor chip to a portion of the substrate;    disposing an underfill material substantially between the substrate and each semiconductor chip;    forming an electrical connection between each semiconductor chip and the substrate;    forming a wall substantially around a periphery of the second surface of each semiconductor chip using a barrier material, the wall and the second surface of each semiconductor chip defining a recess, the barrier material having a first thermal conductivity;    extending the barrier material to contact and adhere to the substrate; and    disposing a heat-dissipating material substantially within the recess, the heat-dissipating material having a second thermal conductivity different than the first thermal conductivity of the barrier material.    
     
     
         33 . The method of  claim 32 , wherein the second thermal conductivity of the heat-dissipating material is greater than the first thermal conductivity of the barrier material.  
     
     
         34 . The method of  claim 32 , wherein the electrical connection between each semiconductor chip and the substrate comprises attaching at least one bond wire between at least one electrical contact point on the second surface of each semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         35 . The method of  claim 34 , wherein the barrier material substantially encapsulates the at least one bond wire.  
     
     
         36 . The method of  claim 34 , wherein the electrical connection between each semiconductor chip and the substrate comprises attaching at least one tape automated bond between at least one electrical contact point on the second surface of each semiconductor chip and a respective electrical contact point on the substrate.  
     
     
         37 . The method of  claim 36 , wherein the barrier material substantially encapsulates the at least one tape automated bond.  
     
     
         38 . The method of  claim 32 , wherein the electrical connection between each semiconductor chip and the substrate comprises attaching at least one conductive bond between at least one electrical contact point on the second surface of each semiconductor chip and a respective electrical contact point on the substrate.