Substrate for carrying a semiconductor chip and a manufacturing method thereof

Abstract

A substrate includes a plurality of insulation layers forming a laminated structure and a built-in capacitor formed in the laminated structure, wherein the laminated structure includes a layer of baked organic polysilane.

1 . A method of manufacturing a substrate to be mounted with a semiconductor chip, said substrate comprising plurality of insulation layers forming a laminated structure and a capacitor provided in said laminated structure, 
 said method comprising the steps of:    forming said laminated structure by laminating said insulation films consecutively, said insulation films including a first insulation film and a second insulation film formed on said first insulation film,    wherein there are provided the steps, after forming said first insulation layer but before forming said second insulation layer, of: forming a first electrode film; forming a dielectric film on said first electrode film; and forming a second electrode film on said dielectric film.    
   
   
       2 . The method as claimed in  claim 1 , wherein said step of forming said laminated structure comprises the steps of: 
 forming a layer of organic polysilane;    pre-baking said layer of organic polysilane;    forming a via-hole in said organic polysilane; and    post-baking said layer of organic polysilane such that said layer of organic polysilane is converted to a baked organic polysilane layer,    said step of post-baking being conducted at a temperature of 230° C. or higher.    
   
   
       3 . The method as claimed in  claim 2 , wherein said step of post-baking is conducted at a temperature of 500° C. or higher.  
   
   
       4 . The method as claimed in  claim 2 , wherein said step of pre-baking is conducted at a temperature of about 120° C.  
   
   
       5 . The method as claimed in  claim 1 , wherein said step of forming said dielectric film comprises an anodization process of said first electrode film.