US2005184319A1PendingUtilityA1

Triple-gate MOSFET transistor and methods for fabricating the same

Priority: Oct 29, 2003Filed: Apr 21, 2005Published: Aug 25, 2005
Est. expiryOct 29, 2023(expired)· nominal 20-yr term from priority
H10D 30/024H10D 30/0227H10D 30/0212H10D 30/601
44
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Transistors and fabrication methods are presented in which a semiconductor body is deposited in a cavity of a temporary form structure above a semiconductor starting structure. The formed semiconductor body can be epitaxial silicon deposited in the form cavity over a silicon substrate, and includes three body portions, two of which are doped to form source/drains, and the other forming a transistor channel that overlies the starting structure. A gate structure is formed along one or more sides of the channel body portion to create a MOS transistor.

Claims

exact text as granted — not AI-modified
1 - 10 . (canceled)  
   
   
       11 . A transistor, comprising: 
 a formed semiconductor body having a single generally planar bottom surface and being deposited over a starting structure, the formed semiconductor body comprising a first body portion, a second body portion, and a third body portion, the second body portion being disposed between the first and third body portions and having first and second sides and a top, the first and third body portions individually comprising doped source/drains; and    a gate structure disposed along at least a portion of the top and sides of the second body portion, the gate structure comprising a conductive gate electrode and a gate dielectric disposed between the gate electrode and the second body portion.    
   
   
       12 . The transistor of  claim 11 , wherein the first, second, and third body portions are disposed along an axis, the axis being generally parallel to a plane of the wafer.  
   
   
       13 . The transistor of  claim 11 , wherein the starting structure comprises a semiconductor and wherein the formed semiconductor body comprises epitaxial silicon, epitaxial silicon germanium, epitaxial germanium, or epitaxial gallium arsenide.  
   
   
       14 . The transistor of  claim 11 , wherein the formed semiconductor body comprises epitaxial silicon.  
   
   
       15 . The transistor of  claim 11 , wherein the formed semiconductor body comprises silicon, silicon germanium, germanium, or gallium arsenide.  
   
   
       16 . The transistor of  claim 11 , wherein the second body portion comprises a channel having a channel length a channel width and a channel depth, and wherein the channel length, the channel width and the channel depth are generally equal.  
   
   
       17 . The transistor of  claim 16 , wherein the channel length is about 25 nm or less.  
   
   
       18 . The transistor of  claim 11 , wherein the second body portion comprises a channel having a channel length of about 25 nm or less.  
   
   
       19 . A transistor, comprising: 
 a formed semiconductor body formed in an opening of a temporary form structure over a starting structure, the formed semiconductor body comprising a first body portion, a second body portion, and a third body portion, the second body portion overlying the starting structure between the first and third body portions and having first and second sides and a top, the first and third body portions individually comprising doped source/drains; and    a gate structure disposed along at least a portion of one or more of the top and sides of the second body portion, the gate structure comprising a conductive gate electrode and a gate dielectric disposed between the gate electrode and the second body portion.    
   
   
       20 . The transistor of  claim 19 , wherein the first, second, and third body portions are disposed in a first plane generally parallel to a plane of the starting structure.  
   
   
       21 . The transistor of  claim 19 , wherein the formed semiconductor body comprises silicon, silicon germanium, germanium, or gallium arsenide.  
   
   
       22 . The transistor of  claim 19 , wherein the second body portion comprises a channel having a channel length a channel width and a channel depth, and wherein the channel length, the channel width and the channel depth are generally equal.  
   
   
       23 . The transistor of  claim 19 , wherein the second body portion comprises a channel having a channel length of about 25 nm or less.  
   
   
       24 . A transistor, comprising: 
 a formed semiconductor body deposited over a semiconductor starting structure, the formed semiconductor body comprising a first body portion, a second body portion, and a third body portion, the second body portion being disposed over the semiconductor starting material between the first and third body portions and having first and second lateral sides and a top, the first and third body portions individually comprising doped source/drains; and    a gate structure disposed along at least a portion of one or more of the top and sides of the second body portion, the gate structure comprising a conductive gate electrode and a gate dielectric disposed between the gate electrode and the second body portion.

Join the waitlist — get patent alerts

Track US2005184319A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.