US2005181575A1PendingUtilityA1

Semiconductor structures and manufacturing methods

Priority: Jul 28, 1999Filed: Apr 18, 2005Published: Aug 18, 2005
Est. expiryJul 28, 2019(expired)· nominal 20-yr term from priority
G03F 9/7069G06V 10/245H10P 72/53H10W 46/501H10W 46/301H10W 46/00G03F 9/7076
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Claims

Abstract

A method of making a semiconductor device includes forming an alignment mark in a semiconductor wafer. The alignment mark includes a fist set of parallel lines and a second set of parallel lines. The parallel lines in the first set overlie and cross the parallel lines in the second set. The alignment mark can be used to determine a location of the semiconductor wafer.

Claims

exact text as granted — not AI-modified
1 . A method of making a semiconductor device, the method comprising: 
 providing a semiconductor wafer; and    forming an alignment mark in the semiconductor wafer, the alignment mark comprising a first set of parallel lines and a second set of parallel lines, the parallel lines in the first set overlying and crossing the parallel lines in the second set.    
   
   
       2 . The method of  claim 1  wherein the parallel lines in the first set are aligned orthogonally relative to the parallel lines in the second set.  
   
   
       3 . The method of  claim 1  wherein both the first set and the second set of parallel lines includes more than, three parallel lines.  
   
   
       4 . The method of  claim 1  and further comprising using the alignment mark to determine a location of the semiconductor wafer.  
   
   
       5 . The method of  claim 4  wherein using the alignment mark to determine a location of the semiconductor wafer comprises reflecting energy with a predetermined wavelength from a surface of the semiconductor wafer.  
   
   
       6 . The method of  claim 4  wherein using the alignment mark to determine a location of the semiconductor wafer comprises: 
 simultaneously directing a first beam of light and a second beam of light toward the semiconductor wafer, the first beam of light being spaced from the second beam of light;    receiving the first beam of light after the first beam of light has been reflected from the semiconductor wafer; and    receiving the second beam of light after the second beam of light has been reflected from the semiconductor wafer.    
   
   
       7 . The method of  claim 6  wherein the first beam of light comprises a first line of light and wherein the second beam of light comprises a second line of light, the first line of light being orthogonal to the second light of line.  
   
   
       8 . The method of  claim 7  wherein the parallel lines in the first set are aligned orthogonally relative to the parallel lines in the second set.  
   
   
       9 . The method of  claim 6  wherein the first beam of light is received at a first detector and the second beam of light is received at a second detector.  
   
   
       10 . The method of  claim 1  wherein the semiconductor wafer comprises a semiconductor body of single crystal silicon, and wherein forming an alignment mark comprises etching grooves into the semiconductor body.  
   
   
       11 . The method of  claim 1  wherein forming an alignment mark comprises forming a plurality of alignment marks.  
   
   
       12 . The method of  claim 11  wherein the plurality of alignment marks are formed along a line, the method further comprising simultaneously directing a first beam of light and a second beam of light toward the semiconductor wafer, the first beam of light being spaced from the second beam of light.  
   
   
       13 . A method of making a semiconductor device, the method comprising: 
 providing a semiconductor wafer; and    forming an alignment mark in the semiconductor wafer, the alignment mark comprising a first set of parallel lines and a second set of parallel lines, the parallel lines in the first set overlying and crossing the parallel lines in the second set;    using the alignment mark to align the semiconductor wafer; and    performing a process step to form an integrated circuit in the semiconductor wafer.    
   
   
       14 . The method of  claim 13  wherein the parallel lines in the first set are aligned orthogonally relative to the parallel lines in the second set.  
   
   
       15 . The method of  claim 13  and further comprising using the alignment mark to determine a location of the semiconductor wafer.  
   
   
       16 . The method of  claim 15  wherein using the alignment mark to determine a location of the semiconductor wafer comprises reflecting energy with a predetermined wavelength from a surface of the semiconductor wafer.  
   
   
       17 . The method of  claim 15  wherein using the alignment mark to determine a location of the semiconductor wafer comprises: 
 simultaneously directing a first beam of light and a second beam of light toward the semiconductor wafer, the first beam of light being spaced from the second beam of light;    receiving the first beam of light after the first beam of light has been reflected from the semiconductor wafer; and    receiving the second beam of light after the second beam of light has been reflected from the semiconductor wafer.    
   
   
       18 . The method of  claim 17  wherein the first beam of light comprises a first line of light and wherein the second beam of light comprises a second line of light, the first line of light being orthogonal to the second line of light.  
   
   
       19 . The method of  claim 13  wherein the semiconductor wafer comprises a semiconductor body of single crystal silicon, and wherein forming an alignment mark comprises etching grooves into the semiconductor body.  
   
   
       20 . The method of  claim 19  wherein forming an alignment mark comprises forming a plurality of alignment marks, each of the alignment marks comprising a first set of parallel grooves and a second set of parallel grooves, the parallel grooves in the first set overlying and crossing the parallel grooves in the second set.

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