US2005180083A1PendingUtilityA1

Drive circuit for el display panel

Assignee: TOSHIBA MATSUSHITA DISPLAY TECPriority: Apr 26, 2002Filed: Mar 5, 2003Published: Aug 18, 2005
Est. expiryApr 26, 2022(expired)· nominal 20-yr term from priority
H10K 59/8794H10K 59/8791H10K 59/875H10K 59/874H10K 59/873G09G 3/32G09G 3/20G09G 3/30H05B 33/14G09G 2300/0809G09G 3/3241G09G 2320/08G09G 2300/0861G09G 2310/061G09G 2310/0251G09G 2310/027G09G 3/325G09G 2320/0261G09G 2300/0417G09G 2310/0262G09G 2320/0626G09G 2320/066G09G 3/3266G09G 2320/0214G09G 2320/0233G09G 2300/0452G09G 2300/0842G09G 2320/0223G09G 2310/0297G09G 2320/043G09G 2300/0408G09G 3/006G09G 2330/12G09G 3/22G09G 3/3283G09G 2320/0606G09G 2310/06G09G 2310/0256G09G 2300/0866G09G 2310/0283G09G 2310/02G09G 2310/0218G09G 2330/02G09G 3/2014H10K 50/846H10K 50/87H10K 59/351H10K 59/88H10K 71/861H10K 50/85H10K 50/844H10K 59/131H10K 50/86H10K 59/12H10K 59/353
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Claims

Abstract

To provide a source driver circuit for an EL display panel with reduced variations in output current. A source driver circuit contains unit transistors 634 each of which constitutes a single unit. The 0th bit consists of one unit transistor 634, the 1st bit consists of two unit transistors 634, the 2nd bit consists of four unit transistors 634, the 3rd bit consists of eight unit transistors 634, the 4th bit consists of 16 unit transistors 634, and the 5th bit consists of 32 unit transistors 634. Each unit transistor 634 composes a current mirror circuit in conjunction with a transistor 633 a. Regulating the current Ib flowing through the transistor 633 a allows for changing the current flowing through the unit transistors 634. Accurate source driver IC with small variations can be provided by configuring output current circuits with unit transistors and regulating reference currents so that the output current of the unit transistors can be regulated.

Claims

exact text as granted — not AI-modified
1 . A driver circuit for an EL display panel comprising: 
 reference current generating means of generating a reference current;    a first current source which is fed the reference current from the reference current generating means and outputs a first current which corresponds to the reference current to a plurality of second current sources;    the second current sources which are fed the first current outputted from the first current source and output a second current which corresponds to the first current to a plurality of third current sources; and    the third current sources which are fed the second current outputted from the second current sources and output a third current which corresponds to the second current to a plurality of fourth current sources,    characterize in that among the fourth current sources, an appropriate number of unit current sources are selected according to input image data.    
     
     
         2 . A driver circuit for an EL display panel comprising: 
 a plurality of current generator circuits each of which includes unit transistors equal in number to a power of two;    switch circuits connected to the respective current generator circuits;    internal wiring connected to output terminals; and    a control circuit configured to turn on and off the switch circuits according to input data,    wherein a first end of each switch circuit is connected to the current generator circuit and a second end of each switch circuit is connected to the internal wiring.    
     
     
         3 . The driver circuit for an EL display panel according to  claim 2 , wherein: 
 channel width W of the unit transistors is from 2 to 9 μm both inclusive, and    size (WL) of the transistors is 4 square μm or more.    
     
     
         4 . The driver circuit for an EL display panel according to  claim 2 , wherein: 
 a ratio of channel length L to channel width W of the unit transistors is two or larger; and    power supply voltage used is between 2.5 V and 9 V both inclusive.    
     
     
         5 . A driver circuit for an EL display panel comprising: 
 a first output current circuit including a plurality of unit transistors configured to pass a first unit current;    a second output current circuit including a plurality of unit transistors configured to pass a second unit current; and    an output stage configured to produce an output by adding an output current of the first output current circuit and an output current of the second output current circuit,    wherein the first unit current is smaller than the second unit current,    the first output current circuit operates in a low gradation region and a high gradation region according to gradations, and    the second output current circuit operates in the high gradation region according to gradations, and output current values of the first output current circuit do not change in the high gradation region when the second output current circuit operates.    
     
     
         6 . A driver circuit for an EL display panel comprising: 
 a programming current generator circuit including a plurality of unit transistors corresponding to output terminals;    first transistors configured to generate a first reference current that defines a current flowing through the unit transistors;    gate wiring connected to gate terminals of the plurality of first transistors; and    second and third transistors whose gate terminals are connected to the gate wiring and that form current mirror circuits in conjunction with the first transistors,    wherein a second reference current is supplied to the second and third transistors.    
     
     
         7 . The driver circuit for an EL display panel according to  claim 6 , further comprising: 
 a programming current generator circuit including a plurality of unit transistors corresponding to output terminals;    a plurality of first transistors configured to form current mirror circuits in conjunction with the unit transistors; and    a second transistor configured to generate a reference current flowing through the first transistors,    wherein the reference current generated by the second transistor branches through the plurality of first transistors.    
     
     
         8 . The driver circuit for an EL display panel according to  claim 6 , wherein in a driver IC chip which includes the driver circuit, the third transistor is electrically connected, in an area in which the first reference current supply wirings are placed, to two outermost placed wirings of the reference current supply wiring group placed in the area.  
     
     
         9 . The driver circuit for an EL display panel according to  claim 7 , wherein in a driver IC chip which includes the driver circuit, the third transistor is electrically connected, in an area in which the first reference current supply wirings are placed, to two outermost placed wirings of the reference current supply wiring group placed in the area.  
     
     
         10 . An EL display apparatus comprising: 
 a first substrate on which driver transistors are placed in a matrix and that contains a display area including EL elements formed corresponding to the driver transistors;    a source driver IC configured to apply a programming current or voltage to the driver transistors;    a first wiring formed on the first substrate located under the source driver IC;    a second wiring electrically connected to the first wiring and formed between the source driver IC and the display area; and    an anode wiring that branches from the second wiring and applies an anode voltage to pixels in the display area.    
     
     
         11 . The EL display apparatus according to  claim 10 , wherein the first wiring has a light shielding function.  
     
     
         12 . An EL display apparatus comprising: 
 a display area in which pixels with EL elements are formed in a matrix;    driver transistors configured to supply light-emitting current to the EL elements; and    a source driver circuit configured to supply programming current to the driver transistors,    wherein the driver transistors are P-channel transistors, and    transistors that generate the programming current in the source driver circuit are N-channel transistors.    
     
     
         13 . An EL display apparatus comprising: 
 a display area in which EL elements, driver transistors configured to supply light-emitting current to the EL elements, first switching elements configured to form paths between the driver transistors and the EL elements, and second switching elements configured to form paths between the driver transistors and source signal lines are formed in a matrix;    a first gate driver circuit configured to perform on/off control of the first switching elements;    a second gate driver circuit configured to perform on/off control of the second switching elements; and    a source driver circuit configured to supply programming current to the driver transistors,    wherein the driver transistors are P-channel transistors, and    transistors that generate the programming current in the source driver circuit are N-channel transistors.    
     
     
         14 . An EL display apparatus comprising: 
 EL elements;    P-channel driver transistors configured to supply light-emitting current to the EL elements;    switching transistors formed between the EL elements and the driver transistors;    a source driver circuit configured to supply programming current; and    gate driver circuits configured to keep the switching transistors off for two horizontal scanning periods or longer in one frame period.

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