US2005179139A1PendingUtilityA1

Semiconductor device with cobalt silicide contacts

Priority: Jun 10, 2002Filed: Apr 8, 2005Published: Aug 18, 2005
Est. expiryJun 10, 2022(expired)· nominal 20-yr term from priority
H10P 72/0461H10D 64/0131H10D 64/0112H10P 72/0454H10D 30/601H10D 64/021H10D 30/0227H10D 30/0212
51
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Claims

Abstract

A semiconductor device that includes cobalt-silicide based contacts is disclosed, as well as a process for making the same. Combinations of alloyed layers of Co—Ti—along with layers of Co—are arranged and heat treated so as to effectuate a silicide reaction on a silicon substrate. The resulting structures have extremely low resistance, and show little line width dependence, thus making them particularly attractive for use in semiconductor devices and processes.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device on a silicon based substrate comprising: 
 (a) a transistor which includes at least one source/drain region in the silicon based substrate; and    (b) a first metal layer on the silicon based substrate in contact with said at least one source/drain region, said first metal layer including Cobalt (Co); and    (c) a second metal layer on at least selected portions of the first metal layer including in said at least one source/drain region, said second metal layer including an alloy of Cobalt and a refractory metal; and 
 wherein said first metal layer and said second layer are adapted to form a low resistivity cobalt silicide contact in said source/drain region.  
   
   
   
       2 . The semiconductor device of  claim 1 , wherein said alloy is a composition including 20 to 80 percent atomic Titanium.  
   
   
       3 - 4 . (canceled)  
   
   
       5 . The semiconductor device of  claim 1 , wherein said alloy is a ternary composition of Cobalt, Titanium, and one additional refractory metal and/or carbon.  
   
   
       6 . The semiconductor device of  claim 1 , wherein said first metal layer and said second metal layer are formed in a single chamber of a semiconductor wafer processing cluster tool, and without exposing a wafer to ambient between such steps.  
   
   
       7 . A semiconductor device on a silicon based substrate comprising: 
 (a) a transistor on the silicon based substrate which includes at least one active region; and    (b) a first metal layer on at least selected portions of the silicon based substrate including on said at least one active region, said first metal layer including an alloy of Cobalt and a refractory metal; and 
 wherein said alloy includes a percentage of refractory metal in the range of 1 to approximately 10 percent;  
 further wherein said alloy is adapted to react and form a low resistivity cobalt silicide contact in said at least one active region.  
   
   
   
       8 . (canceled)  
   
   
       9 . The semiconductor device of  claim 7 , wherein said refractory metal is titanium.  
   
   
       10 - 14 . (canceled)  
   
   
       15 . A semiconductor transistor device on a silicon based substrate comprising: 
 (a) a source/drain region and a gate region for the semiconductor transistor device;    (b) a first metal layer on the silicon based substrate including on said gate region and on said source/drain region, said first metal layer including an alloy of Cobalt and a refractory metal; and    (c) a second metal layer on the silicon based substrate including on said gate region and on said source/drain region, said second metal layer including a concentration of Cobalt exceeding that of said first metal layer; and    wherein said first metal layer and said second layer are adapted to form a low resistivity cobalt silicide contact in said source/drain region.    
   
   
       16 . The semiconductor transistor device of  claim 15 , wherein said alloy includes about 20 to 80 atomic percent of Ti.  
   
   
       17 . The semiconductor transistor device of  claim 15 , wherein said second metal layer includes a second alloy of Cobalt and a refractory metal.  
   
   
       18 . The semiconductor transistor device of  claim 15 , wherein within a single semiconductor wafer processing cluster tool without exposing the silicon substrate to outside ambient.  
   
   
       19 - 29 . (canceled)  
   
   
       30 . A semiconductor device comprising: 
 a field effect transistor, including at least one source/drain region; and    a silicide contact region connected to said source/drain region; and    said silicide contact region being formed of cobalt-silicide, and further including a trace concentration of a refractory metal.    
   
   
       31 . The device of  claim 30 , wherein said refractory metal is titanium.  
   
   
       32 . The device of  claim 30 , wherein said refractory metal trace concentration is less than 1%.

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