Memory card and semiconductor device

Abstract

A memory card includes a controller and a nonvolatile semiconductor memory. The controller manages a correspondence between a first address in a semiconductor memory of a first erase block size and a second address in a semiconductor memory of a second erase block size other than the first erase block size. The nonvolatile semiconductor memory is a memory of the second erase block size. The controller executes access to the nonvolatile semiconductor memory by the second address.

1 . A semiconductor device comprising: 
 a memory which stores a program to manage a correspondence between a first address in a semiconductor memory of a first erase block size and a second address in a semiconductor memory of a second erase block size other than the first erase block size; and    a processor which executes the program stored in the memory.    
   
   
       2 . The semiconductor device according to  claim 1 , wherein the second erase block size is larger than the first erase block size.  
   
   
       3 . A memory card comprising: 
 a controller which manages a correspondence between a first address in a semiconductor memory of a first erase block size and a second address in a semiconductor memory of a second erase block size other than the first erase block size; and    a nonvolatile semiconductor memory of the second erase block size,    the controller executing access to the nonvolatile semiconductor memory by the second address.    
   
   
       4 . The memory card according to  claim 3 , wherein the controller includes: 
 a ROM which stores a program to manage the correspondence; and    a CPU which executes the program stored in the ROM.    
   
   
       5 . The memory card according to  claim 3 , wherein the first address includes a physical block address and a logical block address.  
   
   
       6 . The memory card according to  claim 5 , wherein the controller stores and manages at least some of physical block addresses and logical block addresses on the nonvolatile semiconductor memory.  
   
   
       7 . The memory card according to  claim 5 , wherein the controller manages the correspondence between the first address and the second address to assure that logical block addresses of the first address are continued in a physical block of the second erase block size.  
   
   
       8 . The memory card according to  claim 5 , wherein the controller responds to a block data erase instruction from outside, indicating that the data has been erased, but not erasing data from the nonvolatile semiconductor memory.  
   
   
       9 . The memory card according to  claim 3 , wherein the second erase block size is larger than the first erase block size.  
   
   
       10 . The memory card according to  claim 3 , wherein the second erase block size is substantially an integral multiple of the first erase block size.  
   
   
       11 . The memory card according to  claim 3 , wherein the first erase block size is 16 Kbytes and the second erase block size is 256 Kbytes.  
   
   
       12 . The memory card according to one of  claim 3 , wherein the nonvolatile semiconductor memory is a NAND flash memory.  
   
   
       13 . The memory card according to one of  claim 3 , wherein the nonvolatile semiconductor memory has a design rule of smaller than 0.1 μm.  
   
   
       14 . The memory card according to one of  claim 3 , wherein the nonvolatile semiconductor memory has a capacity of 1 gigabit or more.