Semiconductor device with an L-shaped/reversed L-shaped gate side-wall insulating film and method of manufacturing same
Abstract
Provided is a semiconductor device, comprising a gate electrode formed on a semiconductor substrate, source/drain diffusion layers formed on both sides of the gate electrode, a gate electrode side-wall on the side of the source/drain diffusion layer and a gate side-wall insulating film covering a part of the upper surface of the semiconductor substrate in the vicinity of the gate electrode and having an L-shaped/reversed L-shaped cross-sectional shape, and a semiconductor layer extending over the gate side-wall insulating film covering a part of the upper surface of the semiconductor substrate in the vicinity of the gate electrode.
Claims
exact text as granted — not AI-modified1 . A semiconductor device, comprising:
a device isolation formed in a trench formed in a surface region of a semiconductor substrate, which defines a semiconductor device region, the device isolation comprising a first isolation formed in the trench from a bottom of the trench to a predetermined depth of the trench and a second isolation formed on the first isolation to cover the first isolation, the first isolation including a seam.
2 - 14 . (canceled)
15 . A semiconductor device according to claim 1 , wherein the device isolation is a shallow trench isolation formed in the trench, and the seam extends from the surface of the first isolation in a depth direction of the trench toward a bottom of the trench substantially at a central portion in a width direction of the trench.
16 . A semiconductor device according to claim 15 , wherein a transistor having source and drain regions is formed in the device region, and the source and drain regions extend to the device isolation.
17 . A semiconductor device according to claim 1 , wherein a distance from an open surface of the trench to the predetermined depth to which the first isolation is formed is smaller than a minimum diameter of the trench.Join the waitlist — get patent alerts
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