Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus

Abstract

A semiconductor substrate ( 1 ) is secured by suction to a rear face ( 1 b ) of a supporting face ( 11 a ) of a substrate supporting table ( 11 ). In this event, the thickness of the semiconductor substrate ( 1 ) is made fixed by planarization on the rear face ( 1 b ), and the rear face ( 1 b ) is forcibly brought into a state free from undulation by the suction to the supporting face ( 11 a ), so that the rear face ( 1 b ) becomes a reference face for planarization of a front face ( 1 a ). In this state, a tool ( 10 ) is used to cut surface layers of Au projections ( 2 ) and a resist mask ( 12 ) on the front face ( 1 a ), thereby planarizing the Au projections ( 2 ) and the resist mask ( 12 ) so that their surfaces become continuously flat. This can planarize the surfaces of fine bumps formed on the substrate at a low cost and a high speed in place of CMP.

1 . A method for forming on a front face of a substrate bumps for establishing an electrical connection with an external part, said method comprising the steps of: 
 forming the plurality of bumps and an insulating film between the bumps on the front face of the substrate;    performing planarization by cutting using a tool so that surfaces of the bumps and a surface of the insulating film become continuously flat; and    removing the insulating film.    
     
     
         2 . The method for forming bumps according to  claim 1 , wherein in forming the bumps, 
 the insulating film is processed to form a mask having a plurality of openings in a form of electrodes, and then the openings of the mask are filled with a conductive material.    
     
     
         3 . The method for forming bumps according to  claim 2 , wherein the openings of the mask are filled with the conductive material by a plating method.  
     
     
         4 . The method for forming bumps according to  claim 1 , 
 wherein the bumps are formed by a nickel-based electroless plating method, and    wherein in cutting the surfaces of the bumps, layers with a high concentration of phosphor created in surface layers of the bumps are removed.    
     
     
         5 . The method for forming bumps according to  claim 4 , wherein after the bumps are formed by the nickel-based electroless plating method, the insulating film is formed to cover the bumps.  
     
     
         6 . The method for forming bumps according to  claim 1 , wherein LSI elements are formed on the substrate, and the bumps are connected with the LSI elements.  
     
     
         7 . The method for forming bumps according to  claim 1 , wherein the surfaces of the bumps are subjected to the cutting so that the bumps have the same height on the substrate.  
     
     
         8 . The method for forming bumps according to  claim 7 , further comprising the step of: 
 performing planarization by machining on a rear face of the substrate with reference to the front face of the substrate,    wherein the planarization of the surfaces of the bumps and the surface of the insulating film is performed with reference to the rear face of the substrate.    
     
     
         9 . The method for forming bumps according to  claim 8 , wherein said steps are performed on a plurality of the substrates to uniformize the substrates so that the thicknesses of the substrates become identical.  
     
     
         10 . The method for forming bumps according to  claim 8 , wherein in performing planarization of the surfaces of the bumps and the surface of the insulating film, 
 correction of parallelism of the semiconductor substrate is performed with reference to the rear face, and a position of the front face is detected, so that a cutting amount is calculated from the detected front face for control.    
     
     
         11 . The method for forming bumps according to  claim 10 , wherein in detecting the position of the front face of the substrate, laser light is applied to the insulating film at a plurality of points within a peripheral region of the front face to heat and scatter an insulator to thereby expose portions of the front face.  
     
     
         12 . The method for forming bumps according to  claim 10 , wherein in detecting the position of the front face of the substrate, infrared laser light is applied to the rear face and reflected light from the front face is measured.  
     
     
         13 . A semiconductor device, comprising: 
 a pair of semiconductor substrates each having a plurality of bumps formed on a front face thereof for establishing an electrical connection with an external part,    surfaces of the bumps being continuously uniformly planarized by cutting using a tool above each of the semiconductor substrates, and    the semiconductor substrates being integrated, with the planarized surfaces of the bumps opposing each other and connected.    
     
     
         14 . The semiconductor device according to  claim 13 , wherein LSI elements are provided on each of the semiconductor substrates, in which the bumps are connected with the LSI elements on each of the semiconductor substrates.  
     
     
         15 . The semiconductor device according to  claim 13 , wherein the bumps are made to have the same height on each of the semiconductor substrates.  
     
     
         16 . The semiconductor device according to  claim 15 , wherein machining is performed on a rear face side of each of the semiconductor substrates with reference to the front face so that the rear face is planarized and the thickness of the substrate is made uniform.  
     
     
         17 . A method for manufacturing a semiconductor device, comprising the steps of: 
 forming bumps on each front face of a pair of semiconductor substrates in a manner to bury the bumps in an insulating film;    performing planarization by cutting using a tool so that surfaces of the bumps and a surface of the insulating film become continuously flat;    removing the insulating film; and    integrating the semiconductor substrates, with the planarized surfaces of the bumps opposing each other and connected.    
     
     
         18 . The method for manufacturing a semiconductor device according to  claim 17 , wherein LSI elements are provided on each of the semiconductor substrates, in which the bumps are connected to the LSI elements on each of the semiconductor substrates.  
     
     
         19 . The method for manufacturing a semiconductor device according to  claim 17 , further comprising the step of: 
 performing planarization by machining on a rear face of the substrate with reference to the front face of the substrate,    wherein the planarization of the surfaces of the bumps and the surface of the insulating film is performed with reference to the rear face of each of the semiconductor substrates.    
     
     
         20 . A method for forming on a front face of a substrate bumps for establishing an electrical connection with an external part, said method comprising the steps of: 
 forming the plurality of bumps on the front face of the substrate; and    performing planarization by cutting using a tool so that surfaces of the plurality of bumps become continuously flat.    
     
     
         21 . A method for manufacturing a semiconductor device, comprising the steps of: 
 forming a plurality of bumps on each front face of a pair of semiconductor chips;    performing planarization by cutting using a tool so that surfaces of the plurality of bumps become continuously flat; and    integrating the pair of semiconductor chips having the plurality of bumps having the planarized surfaces, with the bumps connected opposing each other.    
     
     
         22 . The method for manufacturing a semiconductor device according to  claim 21 , further comprising the step of: 
 performing planarization by machining on each rear face with reference to each front face of the pair of semiconductor chips,    wherein the planarization of the surfaces of the bumps is performed by the cutting with reference to the rear face.    
     
     
         23 . The method for manufacturing a semiconductor device according to  claim 21 , wherein after the bumps are formed, a resin film is formed to cover the bumps, and planarization is performed by the cutting so that the surfaces of the bumps and a surface of the resin film become continuously flat.  
     
     
         24 . A semiconductor device, comprising: 
 a pair of semiconductor chips each having a plurality of bumps formed on a front face thereof for establishing an electrical connection with an external part,    surfaces of the bumps being continuously uniformly planarized by cutting using a tool above each of the semiconductor chips, and    the semiconductor chips being integrated, with the planarized surfaces of the bumps opposing each other and connected.    
     
     
         25 . The semiconductor device according to  claim 24 , wherein machining is performed on a rear face side of each of the semiconductor chips with reference to the front face so that the rear face is planarized and the thickness of a substrate is made uniform.  
     
     
         26 . The semiconductor device according to  claim 24 , wherein a resin film is formed to cover the bumps, and the surfaces of the bumps and a surface of the resin film are planarized to be continuously uniformly flat.  
     
     
         27 . A method for forming on a front face of a semiconductor substrate stud bumps using a wire bonding method, the stud bumps being bumps for establishing an electrical connection with an external part, said method comprising the steps of: 
 forming a plurality of projections using a bonding wire at electrical connecting points on the front face of the semiconductor substrate; and    performing planarization by cutting using a tool so that top surfaces of the plurality of projections become continuously flat to thereby form the stud bumps.    
     
     
         28 . The method for forming bumps according to  claim 27 , wherein the cutting is repeatedly performed until the intensity of laser light reaches a predetermined value for all of the projections, the intensity being detected by a method using a detecting apparatus comprising a laser emitter and a detector to sweep a laser beam across the top surface of the projection after the machining to detect laser light reflected off the top surface, by the detector.  
     
     
         29 . The method for forming bumps according to  claim 28 , wherein the detector is placed at a rear in a traveling direction of the tool and is moved in synchronism with an operation of the tool.  
     
     
         30 . The method for forming bumps according to  claim 27 , further comprising the steps of: 
 forming a protective film to cover the plurality of projections; and    performing planarization by the cutting so that top surfaces of the plurality of projections and a surface of the protective film become continuously flat, and then removing the protective film.    
     
     
         31 . A semiconductor device, comprising: 
 a semiconductor chip having a plurality of stud bumps formed on a front face thereof using a wire bonding method, the stud bumps being bumps for establishing an electrical connection with an external part,    top surfaces of the plurality of stud bumps being continuously uniformly planarized by cutting using a tool above the semiconductor chip.    
     
     
         32 . A method for manufacturing a semiconductor device, comprising the steps of: 
 forming a plurality of bumps on a front face of a semiconductor substrate;    performing planarization by cutting using a tool so that surfaces of the plurality of bumps become continuously flat;    cutting out each semiconductor chip from the semiconductor substrate having the plurality of bumps with the planarized surfaces; and    connecting the bump of the semiconductor chip with one end portion of a lead terminal.    
     
     
         33 . The method for manufacturing a semiconductor device according to  claim 32 , further comprising the step of: 
 performing planarization by machining on a rear face with reference to the front face of the semiconductor substrate,    wherein the planarization of the surfaces of the bumps is performed by the cutting with reference to the rear face.    
     
     
         34 . A method for manufacturing a semiconductor device, comprising the steps of: 
 forming a plurality of projections using a wire bonding method at electrical connecting points on a front face of a semiconductor substrate;    performing planarization by cutting using a tool so that top surfaces of the plurality of projections become continuously flat to thereby form stud bumps;    cutting out each semiconductor chip from the semiconductor substrate having the plurality of stud bumps formed thereon; and    connecting the stud bump on the semiconductor chip with one end portion of a lead terminal.    
     
     
         35 . The method for manufacturing a semiconductor device according to  claim 34 , further comprising the step of: 
 performing planarization by machining on a rear face with reference to the front face of the semiconductor substrate,    wherein the planarization of the surfaces of the bumps is performed by the cutting with reference to the rear face.    
     
     
         36 . The method for manufacturing a semiconductor device according to  claim 34 , further comprising the step of: 
 performing inspection by bringing a probe into contact with the surface of the bump, after the surface of the bump is planarized and before the bump is connected with the lead terminal.    
     
     
         37 . A semiconductor device, comprising: 
 a semiconductor chip having a plurality of bumps formed on a front face thereof for establishing an electrical connection with an external part,    surfaces of the bumps being continuously uniformly planarized above the semiconductor chip, and    the bump on the semiconductor chip being integrally connected with one end portion of a lead terminal.    
     
     
         38 . The semiconductor device according to  claim 37 , wherein the bumps is made of gold, and the one end portion of the lead terminal has been subjected to surface treatment with gold or tin.  
     
     
         39 . A semiconductor device, comprising: 
 a semiconductor chip having a plurality of stud bumps formed on a front face thereof using a wire bonding method, the stud bumps being a plurality of bumps for establishing an electrical connection with an external part,    surfaces of the stud bumps being continuously uniformly planarized above the semiconductor chip, and    the stud bump on the semiconductor chip being integrally connected with one end portion of a lead terminal.    
     
     
         40 . The semiconductor device according to  claim 39 , wherein the stud bump is made of gold, and the one end portion of the lead terminal has been subjected to surface treatment with gold or tin.  
     
     
         41 . A method for manufacturing a semiconductor device, comprising the steps of: 
 introducing a semiconductor chip having a plurality of electrodes formed on a front face thereof into an inert atmosphere and performing planarization by cutting using a tool so that surfaces of the plurality of electrodes become continuously flat; and    integrally connecting the plurality of electrodes on the semiconductor chip and a circuit board in a state in which the planarized surfaces of the plurality of electrodes are kept clean in the inert atmosphere.    
     
     
         42 . The method for manufacturing a semiconductor device according to  claim 41 , 
 wherein a plurality of electrodes formed on a front face of the circuit board have been subjected to planarization by cutting using a tool so that the surfaces thereof become continuously flat, and    wherein the semiconductor chip and the circuit board are integrated, with the surfaces of the respective electrodes connected opposing each other.    
     
     
         43 . A semiconductor manufacturing apparatus, comprising: 
 a cutting unit having a tool;    a joining unit joining a pair of bases introduced; and    an inert atmosphere unit keeping an environment of said cutting unit and said joining unit in a state of an inert atmosphere,    said cutting unit having a function of performing planarization by cutting using the tool at least on one of the pair of bases having a plurality of electrodes formed on front faces thereof in the inert atmosphere so that surfaces of the plurality of electrodes become continuously flat, and    said joining unit having a function of integrating the pair of bases by connecting the plurality of electrodes in the state in which the planarized surfaces of the plurality of electrodes are kept clean in the inert atmosphere.    
     
     
         44 . A substrate processing apparatus in forming on a front face of a substrate bumps for establishing an electrical connection with an external part, comprising: 
 a substrate supporting table including a flat supporting face and vacuum-sucking one face of the substrate to the supporting face to forcibly support and secure the one face as a flat reference face; and    a tool cutting another face of the substrate,    wherein the substrate having the plurality of bumps and an insulating film between the bumps formed on the front face thereof is supported and secured on said supporting table, and subjected to planarization by the cutting using the tool so that surfaces of the bumps and a surface of the insulating film become continuously flat.    
     
     
         45 . The substrate processing apparatus according to  claim 44 , wherein a rear face of the substrate is cut by the tool using the front face of the substrate as a reference face through use of said substrate supporting table, and then the front face of the substrate is cut by the tool using the rear face of the substrate as a reference face through use of said supporting table, to thereby perform planarization so that the surfaces of the bumps and the surface of the insulating film become continuously flat.  
     
     
         46 . The substrate processing apparatus according to  claim 44 , wherein correction of parallelism of the semiconductor substrate is performed with reference to the rear face, and a position of a wire formation face is detected, so that a cutting amount is calculated from the detected wire formation face for control.  
     
     
         47 . The substrate processing apparatus according to  claim 46 , wherein when the position of the wire formation face is detected, laser light is applied to the insulating film at a plurality of points within a peripheral region of the wire formation face to heat and scatter an insulator to thereby expose portions of the wire formation face.  
     
     
         48 . The substrate processing apparatus according to  claim 46 , wherein when the position of the wire formation face is detected, infrared laser light is applied to the rear face and reflected light from the wire formation face is measured.